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Avalanche ruggedness of parallel SiC power MOSFETs

Fayyaz, A.; Asllani, B.; Castellazzi, A.; Riccio, M.; Irace, A.

Authors

A. Fayyaz

B. Asllani

A. Castellazzi

M. Riccio

A. Irace

Abstract

The aim of this paper is to investigate the impact of electro-thermal device parameter spread on the avalanche ruggedness of parallel silicon carbide (SiC) power MOSFETs representative of multi-chip layout within an integrated power module. The tests were conducted on second generation 1200 V, 36 A–80 mΩ rated devices. Different temperature-dependent electrical parameters were identified and measured for a number of devices. The influence of spread in measured parameters was investigated experimentally during avalanche breakdown transient switching events and important findings have been highlighted.

Journal Article Type Article
Publication Date Sep 30, 2018
Journal Microelectronics Reliability
Print ISSN 0026-2714
Publisher Elsevier
Peer Reviewed Peer Reviewed
Volume 88-90
Pages 666-670
DOI https://doi.org/10.1016/j.microrel.2018.06.038
Keywords Avalanche ruggedness; SiC; Power MOSFETs; UIS; Parallel operation; Robustness
Publisher URL https://www.sciencedirect.com/science/article/pii/S0026271418304542?via%3Dihub
Additional Information This article is maintained by: Elsevier; Article Title: Avalanche ruggedness of parallel SiC power MOSFETs; Journal Title: Microelectronics Reliability; CrossRef DOI link to publisher maintained version: https://doi.org/10.1016/j.microrel.2018.06.038; Content Type: article; Copyright: © 2018 Elsevier Ltd. All rights reserved.

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