Skip to main content

Research Repository

Advanced Search

Avalanche ruggedness of parallel SiC power MOSFETs

Fayyaz, A.; Asllani, B.; Castellazzi, A.; Riccio, M.; Irace, A.


Senior Research Fellow

B. Asllani

A. Castellazzi

M. Riccio

A. Irace


© 2018 Elsevier Ltd The aim of this paper is to investigate the impact of electro-thermal device parameter spread on the avalanche ruggedness of parallel silicon carbide (SiC) power MOSFETs representative of multi-chip layout within an integrated power module. The tests were conducted on second generation 1200 V, 36 A–80 mΩ rated devices. Different temperature-dependent electrical parameters were identified and measured for a number of devices. The influence of spread in measured parameters was investigated experimentally during avalanche breakdown transient switching events and important findings have been highlighted.


Fayyaz, A., Asllani, B., Castellazzi, A., Riccio, M., & Irace, A. (2018). Avalanche ruggedness of parallel SiC power MOSFETs. Microelectronics Reliability, 88-90, 666-670.

Journal Article Type Article
Acceptance Date Jun 25, 2018
Online Publication Date Sep 30, 2018
Publication Date Sep 30, 2018
Deposit Date Jan 9, 2019
Publicly Available Date Oct 1, 2019
Journal Microelectronics Reliability
Print ISSN 0026-2714
Publisher Elsevier
Peer Reviewed Peer Reviewed
Volume 88-90
Pages 666-670
Keywords Avalanche ruggedness; SiC; Power MOSFETs; UIS; Parallel operation; Robustness
Public URL
Publisher URL
Additional Information This article is maintained by: Elsevier; Article Title: Avalanche ruggedness of parallel SiC power MOSFETs; Journal Title: Microelectronics Reliability; CrossRef DOI link to publisher maintained version:; Content Type: article; Copyright: © 2018 Elsevier Ltd. All rights reserved.


You might also like

Downloadable Citations