Bassem Mouawad email@example.com
Low inductance 2.5kV packaging technology for SiC switches
Mouawad, Bassem; Li, Jianfeng; Castellazzi, Alberto; Johnson, Christopher Mark; Erlbacher, Tobias; Friedriches, Peter
Alberto Castellazzi firstname.lastname@example.org
Christopher Mark Johnson email@example.com
The switching speed of power semiconductors has reached levels where conventional semiconductors packages limit the achievable performance due to relatively high parasitic inductance and capacitance. This paper presents a novel packaging structure which employs stacked substrate and flexible printed circuit board (PCB) to obtain very low parasitic inductance and hence feature high switching speed SiC power devices. A half-bridge module aimed at blocking voltage up to 2.5kV has been designed to ac¬commodate 8 SiC JFETs and 4 SiC diodes. Electromagnetic simulation results reveal extremely low in¬ductance values of the major loops. Due to delay delivery of those custom ordered substrate and PCB, the prototyping samples of the designed module have yet been constructed. The up to date results including experimental construction, electrical and thermal performance of the samples will be presented at the conference.
|Publication Date||Jan 1, 2016|
|Peer Reviewed||Peer Reviewed|
|APA6 Citation||Mouawad, B., Li, J., Castellazzi, A., Johnson, C. M., Erlbacher, T., & Friedriches, P. (2016). Low inductance 2.5kV packaging technology for SiC switches|
|Related Public URLs||https://conference.vde.com/cips/2016/Pages/Report.aspx|
|Copyright Statement||Copyright information regarding this work can be found at the following address: http://eprints.nottingh.../end_user_agreement.pdf|
|Additional Information||Published in: ETG-Fb. 148: CIPS 2016
9th International Conference on Integrated Power Electronics Systems, Proceedings March, 8 – 10, 2016, Nuremberg/Germany.
ETG-Fachberichte 2016, 586 pages, CD-Rom.
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