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Characterisation and modelling of gallium nitride power semiconductor devices dynamic on-state resistance

Li, Ke; Evans, Paul; Johnson, Mark

Authors

Ke Li

PAUL EVANS paul.evans@nottingham.ac.uk
Associate Professor

MARK JOHNSON mark.johnson@nottingham.ac.uk
Professor of Advancedpower Conversion



Abstract

GaN-HEMTs suffer from trapping effects which increases device ON-state resistance (RDS(on)) above its theoretical value. This increase is a function of the applied DC bias when the device is in its OFF state, and the time which the device is biased for. Thus, dynamic RDS(on) of different commercial GaN-HEMTs are characterised at different bias voltages in the paper by a proposed new measurement circuit. The time-constants associated with trapping and detrapping effects in the device are extracted using the proposed circuit and it is shown that variations in RDS(on) can be predicted using a series of RC circuit networks. A new methodology for integrating these RDS(on) predictions into existing GaN-HEMT models in standard SPICE simulators to improve model accuracy is then presented. Finally, device dynamic RDS(on) values of the model is compared and validated with the measurement when it switches in a power converter with different duty cycles and switching voltages.

Citation

Li, K., Evans, P., & Johnson, M. (2018). Characterisation and modelling of gallium nitride power semiconductor devices dynamic on-state resistance. IEEE Transactions on Power Electronics, 33(6), 5262 - 5273. https://doi.org/10.1109/TPEL.2017.2730260

Journal Article Type Article
Acceptance Date Jul 16, 2017
Online Publication Date Sep 18, 2017
Publication Date Jun 30, 2018
Deposit Date Jul 21, 2017
Journal IEEE Transactions on Power Electronics
Print ISSN 0885-8993
Electronic ISSN 0885-8993
Publisher Institute of Electrical and Electronics Engineers
Peer Reviewed Peer Reviewed
Volume 33
Issue 6
Pages 5262 - 5273
DOI https://doi.org/10.1109/TPEL.2017.2730260
Keywords GaN-HEMT; Dynamic ON-state resistance; Power semiconductor device characterisation; Power semiconductor device modelling; Equivalent circuit
Public URL http://eprints.nottingham.ac.uk/id/eprint/44351
Publisher URL https://ieeexplore.ieee.org/document/8039282/
Copyright Statement Copyright information regarding this work can be found at the following address: http://creativecommons.org/licenses/by/4.0

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