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Silicon Carbide n-IGBTs: Structure Optimization for Ruggedness Enhancement

Almpanis, Ioannis; Antoniou, Marina; Evans, Paul; Empringham, Lee; Gammon, Peter; Undrea, Florin; Mawby, Philip; Lophitis, Neophytos

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Authors

Ioannis Almpanis

Marina Antoniou

Peter Gammon

Florin Undrea

Philip Mawby

Neophytos Lophitis



Abstract

In recent years, silicon carbide (SiC) based devices are increasingly replacing their silicon counterparts in power conversion applications due to their performance superiority. SiC insulated-gate bipolar transistors are particularly interesting as they appear to be the most appropriate for medium and high voltage applications due to their low on-state voltage drop for devices rated at 10kV or higher. However, the widespread adoption of SiC IGBT requires rugged devices capable of surviving in harsh conditions. By using Sentaurus TCAD and validated models based on published experimental results, the short-circuit, unintentional turn-on and dV/dt ruggedness of SiC IGBTs are comprehensively explored and the impact of device parameters on the overall IGBT ruggedness were identified. This paper aims to propose the most efficient methods for IGBT ruggedness enhancement on the device level.

Citation

Almpanis, I., Antoniou, M., Evans, P., Empringham, L., Gammon, P., Undrea, F., Mawby, P., & Lophitis, N. (2024). Silicon Carbide n-IGBTs: Structure Optimization for Ruggedness Enhancement. IEEE Transactions on Industry Applications, 60(3), 4251-4263. https://doi.org/10.1109/tia.2024.3354870

Journal Article Type Article
Acceptance Date Dec 14, 2023
Online Publication Date Jan 16, 2024
Publication Date 2024-05
Deposit Date Mar 7, 2024
Publicly Available Date Mar 8, 2024
Journal IEEE Transactions on Industry Applications
Print ISSN 0093-9994
Electronic ISSN 1939-9367
Publisher Institute of Electrical and Electronics Engineers
Peer Reviewed Peer Reviewed
Volume 60
Issue 3
Pages 4251-4263
DOI https://doi.org/10.1109/tia.2024.3354870
Keywords Insulated gate bipolar transistors , Silicon carbide , Semiconductor process modeling , Logic gates , Performance evaluation , Biological system modeling , Threshold voltage , Silicon Carbide , High Voltage , Short-circuit , Impact Of Parameters , Insulat
Public URL https://nottingham-repository.worktribe.com/output/30412147
Publisher URL https://ieeexplore.ieee.org/document/10400815

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