Mohammad Ali Hosseinzadeh
New Asymmetric Cascaded Multi-level Converter with Reduced Components
Hosseinzadeh, Mohammad Ali; Sarbanzadeh, Maryam; Sarbanzadeh, Elham; Rivera, Marco; Wheeler, Patrick
Authors
Maryam Sarbanzadeh
Elham Sarbanzadeh
Marco Rivera
PATRICK WHEELER pat.wheeler@nottingham.ac.uk
Professor of Power Electronic Systems
Abstract
Multi-level converters have been used in several industrial applications. The following work seeks to present a novel power inverter structure featuring a low amount of devices for a multi-level converter with an asymmetric cascaded connection. The suggested architecture consists of a modified T-type structure and a half-bridge inverter that is back-to-back connected. The proposed circuit includes five dc voltage sources and nine semiconductor switches that generate 23 levels. To show the superiority of the proposed structure, a detailed comparison is made with other comparable multi-level converter structures. Simulations in MATLAB/Simulink are shown to validate the behaviour of the proposal.
Citation
Hosseinzadeh, M. A., Sarbanzadeh, M., Sarbanzadeh, E., Rivera, M., & Wheeler, P. (2018). New Asymmetric Cascaded Multi-level Converter with Reduced Components. https://doi.org/10.1109/ESARS-ITEC.2018.8607383
Conference Name | IEEE International Conference on Electrical Systems for Aircraft, Railway, Ship Propulsion and Road Vehicles and International Transportation Electrification Conference (ESARS-ITEC 2018) |
---|---|
Conference Location | Nottingham, UK |
Start Date | Nov 7, 2018 |
End Date | Nov 9, 2018 |
Acceptance Date | Jul 1, 2018 |
Online Publication Date | Jan 14, 2019 |
Publication Date | Nov 7, 2018 |
Deposit Date | Apr 24, 2019 |
Publicly Available Date | May 16, 2019 |
Publisher | Institute of Electrical and Electronics Engineers |
ISBN | 9781538641927 |
DOI | https://doi.org/10.1109/ESARS-ITEC.2018.8607383 |
Keywords | Inverters , Through-silicon vias , Insulated gate bipolar transistors , Switches , Periodic structures , Uninterruptible power systems , Mathematical model |
Public URL | https://nottingham-repository.worktribe.com/output/1838250 |
Publisher URL | https://ieeexplore.ieee.org/document/8607383 |
Additional Information | © 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. |
Files
New Asymmetric Cascaded Multi-level Converter With Reduced Components
(423 Kb)
PDF
You might also like
Thermal Design of an Integrated Inductor for 45kW Aerospace Starter-Generator
(2020)
Conference Proceeding
A Cascade PI-SMC Method for Brushless Doubly-Fed Induction Machine with Matrix Converter
(2020)
Conference Proceeding
Control Strategy and Communication Architecture for Power Sharing in Microgrids
(2020)
Conference Proceeding