VIJAYARAJA L
Performance Enhancement of Reduced Component Multilevel Inverter with Optimal Placement of Level Shifter
L, VIJAYARAJA; Kumar S, Ganesh; Rivera, Marco; Babaei, Ebrahim
Authors
Abstract
Multi-Level Inverter (MLI) with and without cross-connecting switches is constructed using bi-directional and uni-directional switches and their performances are verified via a real-time experimentation. Here, a cross connecting switch inverter (CCSI) is constructed and then cross connecting switches in CCSI are removed for the modified inverter (MMLI) with reduction of switches. Further, the CCSI and MMLI configuration is studied with the identification of optimal placement of the level shifter circuit in the basic unit and different types of procedures for the design of voltage sources that are used in the inverter to enhance the performance is proposed. The best method of defining the value of voltage sources among the proposed nine different algorithms a 31-level CCSI, a 49 level and 71 level MMLI are designed and tested experimentally. Efficiency, total blocking voltage, harmonic presence, real and reactive powers are obtained for the proposed converters to study their performance. Finally, a comparative analysis is made for the proposed structure against the other MLI in-term of switch count, ON state switches, voltage sources and efficiency.
Citation
L, V., Kumar S, G., Rivera, M., & Babaei, E. (2024). Performance Enhancement of Reduced Component Multilevel Inverter with Optimal Placement of Level Shifter. IEEE Latin America Transactions, 22(6), 502-511. https://doi.org/10.1109/TLA.2024.10534310
Journal Article Type | Article |
---|---|
Acceptance Date | May 20, 2024 |
Online Publication Date | May 20, 2024 |
Publication Date | 2024-06 |
Deposit Date | Jun 3, 2024 |
Publicly Available Date | Jun 5, 2024 |
Journal | IEEE Latin America Transactions |
Print ISSN | 1548-0992 |
Electronic ISSN | 1548-0992 |
Publisher | Institute of Electrical and Electronics Engineers |
Peer Reviewed | Peer Reviewed |
Volume | 22 |
Issue | 6 |
Pages | 502-511 |
DOI | https://doi.org/10.1109/TLA.2024.10534310 |
Keywords | Voltage , Switches , Topology , Multilevel inverters , Voltage control , Bidirectional control , Harmonic analysis , Level shifter , multilevel inverter , power loss , total blocking voltage |
Public URL | https://nottingham-repository.worktribe.com/output/35160166 |
Publisher URL | https://ieeexplore.ieee.org/document/10534310 |
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