Fast functional modelling of diode-bridge rectifier using dynamic phasors

: In this study, a functional model for diode-bridge (DB) rectifiers is developed based on the dynamic phasor concept. The developed model is suitable for accelerated simulation studies of the electric power systems under normal, unbalanced and line faulty conditions. The high accuracy and efficiency of the developed model have been demonstrated by comparison against three-phase time-domain model and against the model employing synchronous space-vector representations. The experimental verification of the developed model is also reported. In addition, an error analysis shows that the error of the developed model is <10% at the most severe unbalanced conditions. The prime purpose of the model is for the simulation studies of more-electric aircraft power architectures at a system level; however, it can be directly applied for simulation study of any other electrical power system interfacing with uncontrolled DB rectifiers.


Introduction
There has been seen a significant penetration of power electronics into electric power systems (EPSs) in recent years. For example, terrestrial EPS's particularly at distribution level promise a multiplicity of power electronic converters to handle renewable sources, energy storage or EPS conditioning. A similar scenario pertains for isolated and mobile EPS, such as more-electric aircraft (MEA) and more-electric ship. In the MEA, the electric power conversion is required to manage power distribution, landing gear, flight actuation and other functions [1].
The use of large numbers of power electronic devices brings significant modelling challenge at the EPS system level because of the system complexity and the wide variation in time constants. The challenge is to balance the simulation speed against the model accuracy and this is dependent on the modelling task. Four different modelling layers are defined according to the modelling bandwidths, that is, architectural models, functional models, behavioural models and component models [2,3]. The architectural layer computes steady-state power flow and is used for weight, cost and cabling studies. In the functional level, the system components are modelled to handle the main system dynamics up to 150 Hz and the error should be <5% in respect of the behaviour model accuracy. The behavioural model uses lumped-parameter subsystem models and the modelling frequencies can be up to hundreds of kilohertz. The component models cover high frequencies, electromagnetic field and electromagnetic compatibility behaviour, and perhaps thermal and mechanical stressing. The bandwidth of component models can be up to in megahertz region if required.
Targeting for acceptable simulation times for system-level EPS modelling, a number of approaches have been investigated. Average state-space models [4] are a standard technique for considering only the fundamental wave converter behaviour. Average modelling of ac distribution systems involves transforming the three-phase ac signals to a synchronous rotating dq frame, henceforth termed the dq0 model. This method has been used in modelling MEA EPSs and is proved to be an effective technique [3]. A model with three-phase ac variables is henceforth called an abc model.
One of the disadvantages of the dq0 approach is that under faulty and unbalanced conditions double-frequency components appear and the simulation time steps must be drastically reduced to maintain accuracy. An alternative approach that can address this problem is dynamic phasors (DPs) [5,6]. The DP method has been applied to the modelling of terrestrial EPS systems including imbalanced regimes [7,8]. Comparative study of a simple EPS with line faults carried out in abc, dq0 and DP domain is given in [9] where the efficiency of the DP approach is demonstrated. The DP method has also been applied for modelling of electrical machines [10,11] and flexible ac transmission systems [12], including active filters [13] and static synchronous compensator [14]. In [15,16], a DP model for thyristor-based high-voltage direct current (HVDC) transmission systems is reported, although only balanced conditions are considered.
Different models for uncontrolled diode-bridge (DBs) rectifiers have been developed in recent publications. A comprehensive analytical model is developed in [17,18], where different operation modes of DBs have been thoroughly studied. Another mathematical model for analysing DBs based on switching functions is introduced in [19]. An average model for DB is proposed in [20]. However, all these models are only for steady-state applications and the power supply is assumed to be balanced. This paper aims to develop a DP model for DBs. This model can be used for both steady-state and transient studies, under balanced and unbalanced conditions. At the time of this study development, no report on DB modelling in DP domain has been published. The most similar to DBs modelled using DP approach is a thyristor-based HVDC converter [16]. In addition, the model reported in [16] is suitable only for balanced operations. The DB functional model presented in this paper is based on the DB relations between ac and dc terminal variables. The negative sequence under unbalanced or fault conditions is treated as a disturbance in the model. Both the 2nd and 6th harmonics on the dc-link voltage are conveniently included in the reported DP model. This enables to cover the ac imbalanced voltage and dc ripple voltage for both continuous and discontinuous operation.
The main results of this paper are summarised as follows: The DP approach has been successfully applied to develop model an uncontrolled DB rectifier applicable for accelerated simulation studies of complex EPS, both balanced and unbalanced, and is consistent with the functional modelling layer specifications in [3].
The model is independent on other EPS devices and may be used as a library element interfacing within an extended three-phase EPS models.

Research Article
The model is verified experimentally under both balanced and unbalanced operations. The computational effectiveness of the developed model is proved through comparison against time-domain abc switching and functional non-switching dq0 models and a significant computational acceleration is demonstrated.

Dynamic phasors
This section, in order to keep this paper self-containment and to assist readability, shortly revises the basic concepts that are employed for the development of the DB model in DP domain.
For the readers who are not familiar with the concept, it is recommended to refer to the basic DP theory [5] since it will be intensively used throughout the rest of this paper. The DP concept assumes that a time-domain nearly periodic waveform x(t) can be represented on the interval t ∈ (t − T, t] by a following Fourier series where ω s = 2π/T and T is the fundamental period of the waveform. X k (t) is the kth Fourier coefficient in complex form referred to as a 'DP' and determined as follows where k is the DP index and angular brackets 〈 〉 are used to denote DP-domain variables. In contrast to the traditional Fourier transformation, these Fourier coefficients are time-varying as the integration interval (window) slides through time. As it follows, the DP represents the variation in specific frequency component over time. The required accuracy of the time-domain variable approximation can be achieved by appropriate selection of a DP set K for a particular modelling task. For example, for dc-like variables and signals the index set only includes the component k = 0, and for purely sinusoidal ones k = 1.
A key factor in developing dynamic models based on DP is the relation between the derivatives of the variable x(t) and the derivatives of the kth Fourier coefficients [5] This can be verified using (1) and (2), and may be used in evaluating the kth phasor of time-domain model. Another important property of DP is that the kth phasor of a product of two time-domain variables can be obtained via the convolution of corresponding DPs The properties (3) and (4) play a key role when transforming the time-domain models into DP domain. Algebraic manipulations in this paper will also exploit the following property of real functions x(t) where the notation * denotes a complex conjugate.

Uncontrolled DB rectifier
A key objective of this paper is development of a computationally efficient model that can represent the DB behaviour in both balanced and unbalanced supply conditions including line faults. The functional level modelling does not require consideration of switching behaviour [3]. Hence, our study is based on the non-switching model that is reviewed in this section. A three-phase DB rectifier is well-documented ac/dc converter and it is shown in Fig. 1. In general case, it is supplemented by an output dc filter L dc C and a front-end inductance L s representing feeding cables, ac chokes etc. The dc load is shown as an equivalent resistance R L . This converter employs uncontrolled diodes; hence the switching instants are determined by the circuit condition exclusively. The time-domain non-switching DB model under balanced conditions is well developed and documented in many publications, for example [17,21].
Under the symmetrical balanced supply the rectifier terminal voltages can be represented as where v m is the voltage magnitude, ω is the supply electrical frequency and j is the initial phase angle. The fundamental of diodes switching function then is given as follows [22] S abc = The switching function (7) defines the input-output relations for the DB where I abc = [i a i b i c ] T is an input ac current in vector-matrix form, v dc and i dc are rectifier output dc voltage and current. As it follows from (9) and (7), the input current is in phase with the input voltage (6) and its magnitude is In a presence of front-end inductance L s , the dc-link voltage (8) reduces because of the commutation effect [22]. Normally, this effect is taken into account by introducing in (8) an additional term corresponding to a voltage drop across the resistance of r f value In the following paper sections, we will also intensively use the voltage (6) expressed as a space vector It is convenient to analyse three-phase power electronic circuits in synchronously rotating frame [3,4]. Define the dq frame such that it rotates with the grid electrical frequency ω. Any three-phase variable f abc can be expressed in the dq frame such that where T is a transformation matrix Combining (8) where v d and v q are d and q components of voltage vector (12). Since the input current fundamental is in phase with the input voltage, its d and q components are as follows Under the balanced supply, j is equal to the initial phase of the input voltage and can be derived from voltage d and q components Equations (15)- (17) comprise the relations between the DB input voltage/current expressed through their dq components and the output dc voltage/current. These equations will be employed for the development of DB model in the DP domain.

Dynamic phasor DB model development
In this section, the non-switching DP-domain DB model is developed. We will start with establishing how to map the generally unbalanced supply voltage vector (12) expressed in terms of synchronous dq frame from time domain into the frequency domain of DPs and how the corresponding DPs can be derived from time-domain values of individual phase voltages v a , v b and v c for both balanced and unbalanced conditions. Then, the DB input-output relations (15) will be transformed into DPs and the DP-domain DB model will be assembled using the derived relations.

Input voltages and current in DPs domain
In general cases, the DB terminal voltage can be represented by where V a , V b and V c are phase voltage magnitudes and j a , j b and j c are their phase angles. Applying the Euler formulae, each of these components can be rewritten as The DPs of phase voltages can be derived applying the definition (2) and selecting the DPs set as k = 1 since (18) includes only the fundamental component Combining (12), (18) and (19) and re-arranging the terms results in the following relation It is clearly seen that the two right-hand-side terms define the positive and the negative sequences of input voltage vector. The latter will appear under unbalanced phase voltages only. In terms of synchronous dq frame defined by (14), the voltage vector (21) can be derived as Re-arranging the right-hand-side terms results in where variables V d0 , V q0 , V d2 and V q2 can be calculated as The d and q axes components of the input voltage vectors v d and v q can be derived from (23) by separation of real and imaginary parts The following important conclusions should be made analysing the result given by (25): † under balanced conditions the voltage dq components become dc-like: v d = V d0 and v q = V q0 ; † if the supply voltage is unbalanced, the dq frame components of the voltage vector will also include the second harmonics; and † the DP set K, in order to represent the supply voltage in dq frame under both balanced and unbalanced conditions, should include zero and 2nd harmonics, that is The mapping of v d and v q into DPs is established in Table 1. The current i d and i q can be derived in the same manner.

dc-Link voltage in DPs domain
In this section, we will transform the DB voltage input-output relation (15a) into the DP domain. The main challenge is because of a non-linear nature of this equation that makes the direct application of DP definition (2) non-analytic. The approach we propose in this paper expands (15a) into a Taylor series with respect to v d and v q followed by the transformation of the truncated series into the DP domain. Considering the DB output voltage as a function of two variables v d and v q as follows Approximating (27) by the Taylor series requires selection of the operation point. The natural choice is the pair {v d , v q } under balanced conditions. Hence, the operating point is defined as {V d0 , V q0 } according to (25). The Taylor expansion of (27) where k i are constants depending on the selected operation point. These can be calculated using (24) and (27) and are given in Appendix 1.
The series (28) can be converted into the frequency domain after suitable truncation. Since v d and v q include harmonics up to the second order in our model, we truncate third-order and higher terms in (28). From (28), in the balanced condition (v d = V d0 and v q = V q0 ) the dc-voltage v dc will be constant and equal to k 0 which is associated with the input voltage positive sequence. Under unbalanced conditions, the negative sequence will appear and disturb the diodes switching function (7). The impact of the negative sequence can be represented as a disturbance to v dc (27) in a form of the second harmonic appearing according to (25) in both v d and v q . Applying the DP index set (26) and employing the convolution property (4) to the truncated Taylor series of (28), the DPs of dc-link voltage v dc are derived as follows kv dc l 0 = k 0 + k 3 kv d l 2 kv d l * 2 + k 4 kv q l 2 kv q l * 2 + k 5 kv d l 2 kv q l * 2 + kv d l * 2 kv q l 2 (29a) kv dc l 2 = k 1 kv d l 2 + k 2 kv q l 2 (29b) The DPs v d0 , v d2 , v q0 and v q2 are given in Table 1 in a previous section. Hence, the DPs for dc-link voltage are fully defined.

Accounting for the dc-voltage ripple
The converter output voltage calculated using (29)  Under the balanced operation, the 6th harmonic in the dc voltage is because of the 5th and 7th harmonic in the switching function [23] that can be given as Combining (30) with (8), (9) and (12), the magnitude of the 6th harmonic in dc-voltage v dc6 and its phase angle j dc6 are derived as follows In a way similar to (20), one can derive the corresponding DP This extra DP can be added to the previously derived set (29) to represent the DB dc-link voltage in the DP domain.

Rectifier ac currents
The linear relationship between the magnitude of the current vector i m and the dc-link current i dc was given in (15b) and can be transformed into DP domain as follows The ac input currents of the rectifier are dependent on the dc load current which is determined jointly by the dc-link voltage v dc and by the load itself. In the proposed model, the dc current is derived from its time-domain value measured at the model output and then converted into the DP. The DP index for 〈i dc 〉 k for linear loads should be chosen according to 〈v dc 〉 k , that is, k = {0, 2, 6}. However, using the following equation allows us to avoid calculating of 〈i dc 〉 2 and 〈i dc 〉 6 with the DP definition (1), and thus no cumbersome calculation of t t−T xe −jkvt dt is needed. With (36), all the dc-link current information will be included in 〈i dc 〉 0 . The fluctuation of i dc will be reflected to the fundamental DPs 〈i a,b,c 〉 1 through 〈i dc 〉 0 and this will be illustrated later in this paper. From (35), the same DP set k = 0 will apply to i m . The DP for the input current d and q axes components can be derived using (16) as follows The main challenge in calculation of (37) deals with establishing the DPs for non-linear functions sin j and cos j. As in the previous section, the approximation is executed by a Taylor series. The non-linear terms are expressed via d and q axes voltage components Selecting the operation point {V d0 , V q0 }, using the same technique as that dealing v dc in (27) derives where h i and g i are constant coefficients that depend on a selected operation point and given in Appendix 1. Hence, the DPs for the non-linear functions (38) are derived. Then, the DPs for DB input current d and q components can be easily derived using (37). Finally, if the modelling task instead of d and q current components requires the current in a form of three-phase ac variables, then the DPs (37) have to be transformed into abc frame as described in the following section.

dq0 to abc transformation in DPs domain
Applying the convolution property to the abc/dq transform given by (13) and (14) yields where T −1 is the generalised inverse matrix T Calculation of T −1 1 requires the DPs for cos ωt and sin ωt. As ω is constant, the DP index for these will include the only component k = 1, hence employing (2) one can easily derive Using (42), the DP of input currents in abc frame can be derived easily. Furthermore, applying definition (1), the corresponding time-domain current values can be calculated as well.

Model assembling
The equations derived in the sections above can be combined together in order to build the DP-domain model of the uncontrolled bridge rectifier as it is shown in Fig. 2. The current flow shown in Fig. 2 illustrates the mapping of i dc into the ac currents 〈i a,b,c 〉 1 . With (36), all the information in i dc is reserved in the DP 〈i dc 〉 0 . This makes 〈i a,b,c 〉 1 a function of the time-varying current i dc and allows the harmonic characteristics in the ac currents to be represented by the fundamental DPs 〈i a,b,c 〉 1 . The DP model shown in Fig. 2 can be used in EPS simulations with no need for the user to understand DP theory. In case studies when the DB rectifier is fed through an inductive line, a small capacitor should be added at input terminals to avoid model state redundancy and related numerical problems. For the user who wishes to build the entire EPS model in the DP domain, the model does not need the interface blocks (coloured in grey in Fig. 2) since the DP variables are already available and the DB model can be directly interfaced to the other EPS model blocks.

Model error analysis
In the DB DP-domain model derived in previous sections, we employed linearisations of (27) and (38) around the operation point determined by the voltage positive sequence; the negative sequence was treated as a disturbance. With the increase of the negative sequence, this consideration may result in some modelling error that is a subject of analysis in the current paper section.
Consider the modelling error ε defined as where v dc_BM is the dc-link voltage calculated by the benchmark model (this is a full switching model in three-phase coordinates) and v dc_DPM is the same calculated by the DP model. The analysis has been performed for the discontinuous mode (DCM) case described in the previous section with the set of phase voltages as Evaluation of the error (43) has been performed by series of simulations varying the magnitude of phase b voltage V b from 0 to 120 V and its phase f b from 0 to 2π. Thus, all balanced and unbalanced conditions are covered. The results of the error analysis are depicted in Fig. 3 as a function of V b , f b and the unbalance factor l. The latter is defined as the ratio of between the magnitudes of negative-sequence voltage v n and the positive-sequence one v p and written as It is clearly seen that the model error greatly depends on unbalance factor l. This is reasonable since with the increase of l the disturbance from the negative sequence becomes more severe, and thus the operation point shifts from {V d0 , V q0 } as selected for linearisation of (27) and (38). The modelling error has a maximum when f b = 5π/6 and V b = 120 Vat these values l takes an extreme value. In practice, if the negative sequence becomes dominant, that is, l > 1, the operation point should be selected using the negative sequence {V d2 , V q2 } considering the positive sequence as a disturbance. Thus, the model can be conveniently adopted for this case. Hence in the error analysis we only have to consider the cases when l ∈ [0, 1] (below the horizontal line l = 1 in Fig. 3b). For the case of balanced operation l = 0, the modelling error is <2%. The line-to-line fault can be considered as the case when l = 1 and V b = 120 V; the modelling error for this event is <10% as follows from Fig. 3b. For the case of phase-to-ground fault (V b = 0 V), the modelling error is very small and is always <2%.
The modelling accuracy analysis confirms that the developed DP model is well suitable for the functional modelling of uncontrolled DB rectifier. The accuracy of the DP model will be experimentally validated and discussed in the following section.

Model experimental validation
A test rig shown in Fig. 4 with parameters given in Appendix 3 has been employed for the model verification. A programmable source Chroma II has been used to apply balanced and unbalanced voltages to the DB. The model has also been verified in continuous (CCMs) and discontinuous current modes (DCMs) as reported below. In the simulation model, small capacitors (C = 1e- were added between the DB and the line inductors as suggested in Section 4.6 above.

Continuous mode
In the experiment, the initial value of balanced supply voltage was set to values v a = v b = v c = 40 V/50 Hz to avoid source protection triggering when imitating the fault. The phase A voltage is set to zero at t = 0.2 s in order to perform the line-to-ground fault to the system. A CCM is ensured with a heavy load on dc-link side by switching on Sw1 and paralleling R L and R′ L′ . The simulation and experiment values of dc-link voltage, input currents and the inductor current are compared in Fig. 5.
As can be seen in Fig. 5a, under the balanced condition t < 0.2 s, v dc has the 6th harmonic component. With the 6th harmonic included in the DP model, the results from the experiment and DP model are well matched. After the line-to-ground fault, the dc-link voltage fluctuates at double frequency. In this case, the 2nd harmonic is included in the DP model and the results from the experiment and simulation are well matched. The DP model and experiment results for i a,b,c are shown in Fig. 5b and they are well matched before and after the fault occurs. The dc-link current i dc is shown in Fig. 5c and it changes from a CCM to a DCM when the fault occurs. It can be seen that under CCM and DCM conditions, the DP model demonstrates good performance in both cases.

Discontinuous mode
In this case, the switch Sw1 is open hence a large load resistance R L results in a small dc-link current which makes the inductor current discontinuous. The experiment starts with balanced voltages set v a = v b = v c = 80 V/50 Hz followed the loss of phase A supply (v a = 0) at t = 0.2 s. The simulation and experiment values of dc-link voltage, input currents and the inductor current are compared in Fig. 6.
As can be seen in Fig. 6a, v dc has a 6th harmonic under the balanced condition and a 2nd harmonic under the line fault condition. In both cases, the results from the DP model are well matched with experiment. The ac-side currents from the experiment and the DP model, shown in Fig. 6b, are well matched before and after the fault occurs. The dc-link current i dc , shown in Fig. 6c, indicates that the rectifier works under the DCM under both normal and faulty conditions. The results from the experiment and DP model are well matched in both cases.
Following the results in this section, the proposed model successfully verified under balanced and unbalanced operations, in both CCMs and DCMs.

Computation time studies
Since the accuracy of the DP model has been validated, this section will focus on the assessment of the computational performance of the developed DP model. For this purpose, different modelling techniques have been applied to an example EPS given in Fig. 7 and the central processing unit (CPU) time taken for simulation run has been compared. The simulated scenario includes balanced and unbalanced operations, as well as continuous and discontinuous DB modes as detailed below. The system parameters are given in Appendix 3.
The following EPS models have been developed and compared: A three-phase EPS with a switching DB rectifier model (ideal switches) illustrated by Fig. 7a and referred to as an abc model; An EPS with all the elements are DP models as shown in Fig. 7b. There are no three-phase time-domain variables in this model and it is referred to as DP model; An EPS in which only the DB is modelled using DPs with three-phase interfaces is as shown in Fig. 7c. The EPS is seen by the user as a three-phase system and the DP formulations are not visible. This is termed the 'DP/int' model; and an EPS with all the elements in dq0 frame [24,25] is as shown in Fig. 7d.

Models comparison under balanced operation
The simulation scenario in this case assumes the DB operation in discontinuous mode followed by impact of dc load making the dc-link current continuous at t = 0.1 s. The dc-link voltage and current for all the models are shown in Fig. 8a. As one can see, the DP and DP/int models match very well to abc model in both discontinuous and continuous modes. In contrast, the dq0 model delivers correct average v dc and i dc values of v dc only in continuous mode; however, in discontinuous mode it demonstrates a significant discrepancy compared with models. This is because in discontinuous mode when i dc becomes zero the capacitor discharges to the load impacting the average value of v dc ; however, the dq0 model does not include the effect of additional charging received because of the 6th harmonic. The CPU time taken by different models is compared in Table 2. The DP and DP/int models in balanced operation are more than 20 times faster than abc model; however, the dq0 model is much faster. The cumulative CPU time during the simulation is shown in Fig. 8b. Note that when the continuous mode occurs the abc model slows down dramatically but DP and DP/int models maintain the simulation speed. This is because in discontinuous operation there are no commutating periods in DB and only two diodes conduct at any instant; however, in continuous mode there are commutation periods requiring from the solver reduction of integration time-steps thus slowing down the simulation.
Summarising, in balanced conditions the DP and DP/int models are slower than dq0 model because of complexity and inclusion of higher harmonics; however, the dq0 model is much less accurate especially in discontinuous mode.

Line-to-line fault
The unbalanced regime is simulated as a line-to-line fault (phases A and B are shortened via the fault resistor R fault = 1e − 4 Ω) at t = 0.4 s. The switch Sw1 is 'on' to ensure the continuous mode prior the fault. The dc-link voltage is shown in Fig. 8c. As one can conclude, the DP and DP/int models match well to abc model under both balanced and unbalanced regimes. The dq0 model in the balanced condition (t < 0.4 s) reflects the voltage average value.  The CPU time taken by different models is compared in Table 3. As one can conclude, the efficiency of the dq0 model is lost in unbalanced operation. This is clearly seen from the cumulative CPU time graph in Fig. 8d: the slope corresponding to dq0 model is the largest when t > 0.4 s. In contrast, the DP-based models maintain their simulation speed and for the entire scenario they are 40 times faster of compared with the abc model and 20 times faster than the dq0 model.
Hence, the results above have confirmed a very good efficiency of the developed DB model compared with other modelling techniques, in particularfor simulation studies of EPS in unbalanced/line fault conditions.

Conclusion
This paper extends the DP concept into modelling a three-phase diode rectifier. Considering the fact that the 6th harmonic is the dominant harmonic on the dc-link side under balanced conditions and the 2nd harmonic for unbalanced conditions, the developed DP model achieved higher accuracy by embracing the 2nd and 6th harmonics in the dc-link variables. Compared with the traditional average model (dq0 model), the developed DP-based model is more accurate in the balanced condition and much more time-efficient in   the unbalanced condition. The accuracy of developed more is validated using simulation and experiment. In addition, our analysis shows that the maximum error is <10% at the most severe unbalanced conditions. The model can be conveniently interfaced with other standard three-phase time-domain model, and thus can be widely used in the accelerated EPS simulation studies.

Acknowledgment
This research was conducted in the frame of CleanSky JTI Project, a FP7 European Integrated Projecthttp://www.cleansky.eu.