Resonant control system for low-voltage ride-through in wind energy conversion systems

: Owing to the high penetration of electrical energy from wind energy conversion systems (WECSs), some countries are enforcing stringent grid codes to regulate low-voltage-ride-through (LVRT) operation of WECSs. This study presents a self-tuning resonant control (RC) system which can be used for LVRT control of the grid interface in the presence of symmetrical or asymmetrical faults. Only two RCs are required to fully control the four degrees of freedom of the converter output current. Sequence component separation is achieved using a new fast-convergence delayed signal cancellation method which is also discussed in this work. The mathematical analysis and design procedure of the control system are presented. Simulation and experimental results obtained from a 3 kW prototype are discussed in this study.


Introduction
Wind energy is one of the industries with the largest and most rapid growth in the renewable energy sector [1,2]. The worldwide wind energy production capacity in 2014 was 369.6 GW [3]. Moreover, the penetration of wind energy is steadily increasing. A good example is The European Union, where 121.3 GW of wind energy capacity has been installed since 2000, representing over 29.1% of the total new capacity installed [4].
Sudden disconnections of large wind power plants may have a significant influence on the stability of conventional power systems. Therefore stringent grid codes are enforced in countries with a high penetration of wind energy [5,6]. In these grid-codes, low-voltage ride-through (LVRT) requirements demand wind-power plants to remain connected in the presence of grid-voltage dips, contributing to the maintenance of grid voltage and frequency stability.
Typically only 12% of grid-faults are symmetrical and, therefore, LVRT control systems have to regulate positive and negative sequence currents and voltages [7]. Control systems for LVRT operation have already been presented in [7][8][9][10][11][12][13][14][15][16][17][18][19]. In most of these papers the controllers are based on two counter revolving synchronously rotating d-q axis systems where the negative and positive sequences are transformed into dc signals and controlled using standard PI regulators [16,17]. Control systems based on feedback linearisation [11], model predictive control [18] and linear quadratic regulators [7] have also been proposed in the literature. However, resonant controllers (RCs) have advantages when compared with the methods discussed previously. A single RC could be used to regulate the positive, negative and the zero sequence (in a 4-wire system) components of voltages and currents [20][21][22][23]. In addition, as shown in this work, for LVRT control, orientation along any specific voltage or current vector is not a requirement, and a phase lock loop (PLL) is implemented only to obtain the grid-frequency which is used to maintain the resonant controller tuned to the correct grid frequency.
This paper is focused on the presentation and discussion of a control algorithm to fulfil the LVRT requirements for a system with a topology composed of a wind turbine interfaced to the grid using a back to back converter. A machine-side converter (MSC) controls the magnetising and torque currents of the electrical generator, using some of the control methods discussed in [1,9,24] and a grid-side converter (GSC) supplies the energy captured by the wind energy conversion system (WECS) to the grid. An intermediate dc-link capacitor bank decouples the control of the GSC from the MSC and vice versa. It is assumed that the dc-link voltage is fairly constant under grid-fault conditions, because it is normal practice for the back to back converter to be equipped with a dc-link voltage limiter, for example, a chopper, which can dissipate any power surplus produced during a grid fault. In addition, some of the dc-link voltage control methods reported in [10,12] could be applied. Consequently, the generator side control system is not addressed in this work and only the control methods for operation of the GSC are discussed.
For asymmetrical faults, unbalanced currents and voltages are produced in the power system. For the implementation of LVRT control systems, usually the measured currents and voltages have to be separated into their positive and negative sequence components in order to eliminate the power oscillations in either the active or reactive power supplied by the GSC [7,25]. In this case sequence separation is required even if the LVRT algorithm is implemented in synchronously rotating d-q coordinates [7,16], (using PI controllers), or in fixed α-β coordinates (using resonant controllers).
One of the methods reported in the literature to achieve sequence separation, is the delayed signal cancellation (DSC) algorithm [26,27] which, in its conventional implementation, has an intrinsic delay of 5 ms (for ω e = 50 Hz) before achieving the separation of the sequence components. In this paper a fast-convergence DSC is discussed, which can be used to separate the sequence components with a much smaller delay. The application of this modified DSC for LVRT control is also presented in this work.
The contribution of this paper can be summarised as follows: † To the best of our knowledge, this is the first paper where the design and experimental implementation of resonant controllers for LVRT applications are reported. The control system is implemented in α-β coordinates, no orientation along any voltage/current vector is needed, and only two RCs are required. In a typical d-q implementation four controllers have to be implemented [16,17].

IET Power Electronics
Research Article † The proposed control system is enhanced by a novel fast convergence delay signal cancellation algorithm which can effectively improve the dynamic performance of the closed loop control by separating the positive and negative sequence components of voltages/currents with a programmable delay time. It is straightforward to integrate both the fast DSC and the RCs in a simple control algorithm since they are both implemented in α-β coordinates. † A better methodology for the design of a self-tuning RC, capable of operating over a wide frequency range, is presented. The RC is designed in the z-domain, to avoid the problems related to the bilinear transform or other discretisation methods [28]. In the opinions of the authors of this work, this methodology is superior to the conventional PR proposed in the literature [28].
The rest of this paper is organised as follows. In Section 2 a brief discussion about LVRT requirements is presented. In Section 3 the proposed control systems are analysed, in Section 4 simulation results are presented and fully analysed. Section 5 discusses the experimental results. Finally a summary of the work is presented in the conclusions.

LVRT requirements
There are different LVRT requirements which are imposed by several countries around the world. A good summary of typical LVRT requirements can be found in [5,29]. As an example, the LVRT requirements for the Spanish grid-code are shown in Fig. 1. Referring to this graphic, the operation modes are: (i) To maintain the WECS connected to the grid, when the line voltage is above the curve for an interval time specified in Fig. 1a. (ii) To support power system voltage regulation using the characteristic shown in Fig. 1b. This is achieved by injecting reactive power into the grid using the GSC. Alternatively the GSC can be controlled to absorb reactive power from the utility, when the voltage is above the nominal value.
Note that in the Spanish grid code, for dips with a voltage reduction >50%, the GSC full-rated current has to be delivered to the grid as reactive current and in this case no active power is injected into the grid [29]. Therefore, active power injection can be only realised for dips with a voltage reduction of <50%.
The LVRT characteristic depicted in Fig. 1 is shown only as a reference. The proposed control system can be applied to any of the grid codes discussed in [5,29].

Proposed control systems
The proposed control system for LVRT operation is shown in Fig. 2. From the grid voltage vector v g , the positive sequence voltage v p g and the negative sequence voltage v n g are estimated using a modified DSC algorithm which can be used with a programmable delay angle θ d . This is further discussed in Section 3.3. The positive sequence voltagev p g is the input to a PLL algorithm designed to estimate the electrical frequencyv e required to maintain tuning of the resonant controllers in the current control system (see the top part of Fig. 2). The reference currents, in α-β coordinates, are calculated using the procedure discussed in Section 3.1. In Fig. 2 this is represented by the block 'i p * a , i p * b , i n * a , i n * b calculation'.

LVRT algorithm
In this section, the algorithms embedded in the block 'i p * a , i p * b , i n * a , i n * b calculation' shown in Fig. 2 are further explained. In previous work the equations required to eliminate the oscillations from the power supplied to the grid have been obtained using d-q components referred to two counter-revolving axis systems. However, considering that in this paper it is proposed to regulate the GSC currents in the stationary axis using resonant controllers, the calculation of the i p * a , i p * b , i n * a , i n * b reference currents is realised using α-β coordinates. To the best of our knowledge this has not been discussed before.
The apparent power supplied to the grid can be calculated as where the superscript 'c' stands for the complex conjugate operator. In (1) V 1 = V 1α + jV 1β is the positive sequence voltage and I 1 = I 1α + jI 1β is the positive sequence current. On the other hand, V 2 , I 2 are the negative sequence voltage and current, respectively. Expanding (1) yields P g (t) = P g 0 + P g c2 cos 2vt + P g s2 sin 2vt (2) where P g (t), Q g (t) are the active and reactive power, respectively, which are time dependant functions, and P g 0 and Q g 0 are the dc components of the active/reactive power. The other terms in (2)-(3) are double frequency (2ω) components. Using (1)-(3) the terms P g 0 , P g c2 , P g s2 , Q g 0 , Q g c2 and Q g s2 are obtained as In (4)-(9) the value of k αβ depends on the α-β transform being used, for example, k αβ = 1 for the power invariant transform and k αβ = 3/2 for the conventional α-β transform [30]. The voltages (v p ga , v p gb , v n ga , v n gb ) are the positive and negative sequence components of the grid voltage vector. In the stationary α-β frame (v p ga , v p gb ) are defined as the real and imaginary components of V 1 e jωt , respectively, (i.e v p ga = V 1a cos vt ( ) − V 1b sin(vt) and v p gb = V 1b cos vt ( ) + V 1a sin(vt)). Similarly, v n ga , v n gb are defined as the real and imaginary components of V 2 e −jωt .
The GSC currents have four degrees of freedom (i p a , i p b , i n a , i n b ) which cannot be used to control six variables (P g 0 , Q g 0 , P g c2 , P g s2 , Q g c2 , Q s2 ). Therefore it is necessary to make a choice of variables according to the control objectives. In this work the current references are calculated to set reference values for the dc components in the active and reactive power (P g 0 , Q g 0 ) and to eliminate the double frequency oscillations in the active power supplied to the grid (i.e. P c2 ≃ 0, P s2 ≃ 0). In addition, when this control methodology is used, the double frequency oscillation in the GSC dc link capacitor current is reduced or even eliminated when the currents are calculated using (18). However, reactive power oscillations (Q c2 , Q s2 ) cannot be simultaneously controlled if undistorted sinusoidal currents are required at the GSC output. In matrix form the required references can be defined as Using (10) the reference currents for the current control system shown in Fig. 2, are calculated using Expanding (11) the reference currents are obtained as Note that (12)-(15) are simple to implement in a digital signal processor. The reference values P * g 0 , Q * g 0 are considered as inputs of the control algorithm (see Fig. 2) and they can be obtained from the grid-code LVRT requirements, for instance using the curves depicted in Fig. 1.
If the currents calculated from (11) are imposed by the current control system, the double frequency oscillations in the dc-link voltage are not entirely eliminated. This is due to the fact that the oscillatory active power consumed by the filter inductance (see Fig. 2) is supplied by the GSC. These power oscillations can be calculated as where L f and R f are the inductance and the intrinsic resistance of the filter connected to the GSC output (see Fig. 2 and Table 1 in the Appendix). Therefore to eliminate the double frequency active power components at the converter terminals, the values of DP f c2 and DP f s2 [see (16)- (17)] have also to be considered in the calculation of the reference currents. Using (5), (6), (16)-(17) a modified version of (11) is obtained as (18) If the currents are obtained using (18), the current and voltage of the GSC dc link are free of double frequency oscillations. However, to calculate (16)-(17) the positive and negative components of the currents have to be estimated using an additional implementation of the DSC algorithm discussed in Section 3.3. Moreover, to solve (18) a more complicated inverse matrix operation has to be implemented. For instance i p * a calculated from (18) is obtained as (see (19)) Similar expressions are required to calculate (i p * b , i n * a , i n * b ). Nevertheless these calculations are still simple to implement using modern digital signal processors (DSPs).
As depicted in Fig. 2 only two resonant controllers are required to regulate the current supplied to the grid. The reference currents are obtained as

Design of the resonant control system
In this work resonant controllers are used to achieve zero steady-state error when sinusoidal reference signals are provided to the LVRT control system [31].
Most of the design methods for resonant controllers reported in the literature are usually based on the Laplace domain and transformed to the z-domain using some of the discretisation methods discussed in [28,32]. However, with this methodology the z-domain controllers obtained using discretisation algorithms (e.g. bilinear transform), do not necessarily maintain the dynamic response of the original s-plane design unless the sampling frequency is relatively high [28,32]. This is particularly difficult to achieve in applications involving high power converters where the switching frequency could be relatively low to limit the converter losses. To avoid these drawbacks, the resonant controllers of Fig. 2 have been directly designed in the z-plane using the zero-pole placement method.
The proposed z-plane resonant controller is shown in Fig. 3a. There is a pole (complex conjugate pair) located on the z-plane unit circle and a zero (complex conjugate pair) located at a distance 'r' from the origin. The transfer function of this controller is which is equivalent to the following second order transfer function RC z ( ) = K r z 2 + 2r cos (v e T s )z + r 2 z 2 + 2 cos (v e T s )z + 1 (22) where ω e is the grid frequency and K r is the controller gain. If the controller is well designed, the poles of the resonant notch are located at the grid frequency ω e . However if the grid frequency changes, a self-tuning resonant controller is appropriate, that is, the transfer function of (22) is calculated online usingv e , the electrical frequency estimated by the PLL (see Fig. 2). This is further discussed in [33] where a self-tuning resonant controller to regulate the stator current of a generator operating over a wide speed range is presented. In the stationary frame the dynamics of the current supplied by the GSC to the grid are described by where v c is the voltage vector synthesised by the GSC. Using (23) the control loop shown in Fig. 3c is obtained. In this figure the converter space-vector modulation (SVM) is represented by a delay of one switching period. The GSC (an actuator) is represented as a zero order hold.
The design of the current control is realised using root-locus and bode diagrams. In order to increase the dynamic performance, a lead-lag network can be used. Considering this lead-lag, the transfer function of the controller is G c z ( ) = K r z 2 + 2r cos (v e T s )z + r 2 z 2 + 2 cos (v e T s )z + 1 Two controllers with transfer function G c (z) [see (24)] are sufficient to regulate both currents i * a and i * b [see (20)]. For the design used in this work the current control loop has a crossover frequency of approximately 700rads −1 , and a phase margin of more than 60°.

Fast convergence DSC algorithm
The conventional DSC reported in the literature [26,34] separates the positive and negative sequence components using (24) and (25) v where v p gab , v n gab are the estimation of the positive and negative sequence grid voltage vectors, respectively, v g is the total grid voltage vector and T is the signal period (20 ms for 50 Hz signals). The main disadvantage of (25)- (26) is that a delay of about 5 ms (for 50 Hz) is introduced in the calculation. Moreover, for a discrete implementation of (25)-(26) the ratio between the fundamental frequency and the sampling period has to be an integer.
An algorithm to achieve separation of the positive and negative sequence components, with a smaller delay, has been proposed by the authors in [27]. In this paper the method is introduced, however, the application of this DSC algorithm to LVRT has not been addressed in that work and it is discussed here. For completeness, the DSC algorithm presented in [27] is briefly discussed in this section.
From (1) the grid voltage vector is obtained as Then, using (27) it can be shown that the positive-negative sequence signals can be instantaneously calculated as However, in a digital implementation, direct differentiation of the voltage amplifies the high frequency noise in v g (t). Therefore, an alternative is to use the following expression where θ d is a delay angle. Note that v s in (30) does not necessarily have a physical meaning. Using (27) in (30) the vector v s is obtained as Using (31) the positive sequence component is estimated as Using the same procedure, the negative sequence component of v g is estimated as Using (32)-(33) the implementation of the proposed fast DSC is shown in Fig. 4. The time delay of NT s seconds (where N is an integer and T s the sampling time) corresponds to a delay angle of θ d rads. More information about this fast convergence DSC is outside the scope of this work and the interested reader is referred to [27].

Simulation results
The control systems presented in Section 3 have been simulated using PLECS ® . The control loops depicted in Figs. 2 and 4 have been simulated considering a two-level GSC with ideal insulated-gate bipolar transistor (IGBT) switches. The converter operates at a switching frequency of 3 kHz and is connected to the grid using line inductors (L f ) of 5 mH. The converter dc link voltage is regulated to a constant value of 650 V. In this work the classification of voltage sags presented in [35] (e.g. dip type, A, B, etc.) is used. For the results presented in this section and the section discussing the experimental results, the control of the two-level voltage-source power converter is realised using a standard algorithm for SVM (see [33]). Fig. 5 shows the grid voltages for a 30% dip type C (i.e. the voltage on two of the phases are reduced to 30% of the pre-fault value). Fig. 6a illustrates the performance of the proposed DSC algorithm to estimate the negative sequence voltage, when a delay of 2.5 ms is considered. This is corroborated by the results presented in the amplified view of the negative sequence voltage, where it is evident that the proposed DSC converges in approximately 2.5 ms. For simplicity, only the negative sequence signal is illustrated in Fig. 6a. However, more results are fully discussed in Section 5, 'experimental results'.
The performance of the proposed control system is depicted in Fig. 6b, when the α-β currents are calculated using (12)- (15) and (20). Before the fault the GSC is supplying 3 kW to the grid with unity power factor. When the dip C (shown in Fig. 5) is produced, the system is controlled to supply only reactive power to the grid with an average reactive power of 3 kVAr (i.e. the reference active and reactive powers of (11) are set to P * g 0 = 0 and Q * g 0 = 3 kVAr, respectively). Note that for this test the active power supplied to the grid is virtually free of double frequency oscillations.  However, as mentioned before, the four α-β currents do not provide enough degrees of freedom to eliminate the oscillation in the reactive power which has a notable 100 Hz component (see Fig. 6b top and middle waveforms).
As discussed in Section 3, when the active power supplied to the grid is ripple free, the GSC has to supply the double frequency oscillations present in the filter active power. This is illustrated in the top and middle waveforms of Fig. 6b, where the active power supplied to the grid is illustrated and shown to be virtually ripple free. Finally, in the lower waveform of Fig. 6b, the currents in α-β coordinates are shown. These currents correspond to the total current obtained from (20) and regulated using two resonant controllers (see G c (z) in (24)).
As discussed in Section 3, the positive and negative sequence components of the currents can be calculated (using (18)) to eliminate the oscillations in the power supplied by the grid side converter. This is illustrated in Fig. 6c, considering the same type C dip fault depicted in Fig. 5. In Fig. 6c, the active power GSC output is free of double frequency components. Nevertheless, in this case, the power oscillations, DP f c2 and DP f s2 , required by the filter inductance, are supplied by the grid side converter, as shown in the lower waveform presented in Fig. 6c. Again for this test the active and reactive power are regulated to P * g 0 = 0 and Q * g 0 = 3 kVAr during the fault (see (18)). As discussed in Section 3, if (18) is used to calculate the demanded (i * a , i * b ) currents, then an estimation of the negative and positive sequence currents has to be obtained. The estimation of the negative sequence current is shown in Fig. 6d. Note that the estimation is also obtained in ≃2.5 ms.
As depicted in some of the figures, immediately after the fault is applied (or cleared) there are some peaks in the positive and negative sequence components estimated by the DSC algorithm. These disturbances are produced by the numerical implementations of ∂v g (t)/∂t and ∂i(t)/∂t which are implicit in the DSC algorithm (see (28)- (29)). Differentiation of these signals amplifies the high frequency components inherent to the step-like changes in the current and voltages, which are produced after the fault condition is applied or removed. As discussed in [27] the peaks in the estimated positive and negative signals can be reduced increasing the delay angle θ d [see (30)]. However in this work this has not been considered necessary because these peaks have a negligible effect on the dynamic performance of the proposed control system.
Note that it is only for the results presented in Figs. 6c and d that the positive-negative sequence components of the GSC currents are  (18)). Consequently, just in this case, the numerical implementation of ∂i(t)/∂t (implicit in the DSC algorithm) is performed.

Experimental results
The control systems depicted in Fig. 2 have been embedded in an experimental rig composed of a 4-leg matrix converter, a two-level voltage source inverter and the inductances/capacitances used in the power filter. The schematic of the experimental rig is shown in Fig. 7 with the matrix converter operating as a programmable power source using the control system methodology reported in [36].
The experimental system is controlled using two Texas Instruments TMS320C6713 DSPs and two ACTEL FPGA boards, one for the control of each power converter. Each FPGA board has 10 AD channels of 14 bits, 1 µs conversion time each. Hall-effect transducers are used to measure the currents and voltages.
The GSC has been designed and built using three 1200 V, 35 A dual IGBT switch Infineon BSM35GB120DN2 devices. This converter is operated with a switching frequency of 3 kHz, with the switching signals being transmitted to the converter using optical fibres. The matrix converter is implemented using twelve bidirectional switches, Semikron SK60GM123. Four current transducers and three voltage transducers are included in the matrix converter PCB. The matrix converter is operated with a switching frequency of 12.5 kHz. More information about the experimental system is presented in the Appendix.
The performance of the proposed DSC algorithm is shown in Fig. 8a. For this test a dip type D fault is synthesised by the programmable power supply and the estimation of the positive and negative sequence components of the grid voltage (i.e. v p gab and v n gab ) are programmed considering four values of delay angle θ d (see (30)-(31)). These are θ d = π/2 (corresponding to a delay of T d = 5 ms at 50 Hz) θ d = π/4 for T d = 2.5 ms, θ d = π/10 for T d = 1 ms and θ d = π/20 for T d = 500 μs. For this test the four delay times have been simultaneously programmed in a TMS320C6713 DSP.
The top waveform in Fig. 8a presents the asymmetrical fault (dip type C) which is programmed at t≃70 ms. Before the fault the voltage is balanced and after the fault the phase voltages v an , v bn and v cn are reduced to 80, 55 and 55%, respectively. The middle waveform in Fig. 8a shows the estimation of the negative sequence grid voltage v n ga and an amplified view of the negative sequence estimation is presented in the lower waveform, where the performance of the DSC considering the four delay angles is illustrated. From this graphic it is concluded that the overshoot of the DSC estimator is increased when the delay angle θ d is smaller. This is because the numerical implementation of ∂v g (t)/∂t is implicit in (28)-(29) (see [27]) and this amplifies the high frequency components of the grid voltage. Experimental tests with a delay of 500 μs have been included in this work showing the flexibility of the proposed DSC algorithm to achieve good performance even when low values of θ d are used.
The performance of the proposed LVRT control system for a type-B dip (see [35]) is shown in Figs. 8b and c. In this case, the grid voltage of one phase is reduced to a 50% of its nominal value. For this fault, the current is regulated to supply active power to the grid without 100 Hz components, which is achieved injecting unbalanced currents. To verify the control system performance to provide non-zero active power during the voltage dip, power references P g0 * ≃ 1.2 kW and Q g0 * = 0 are used for the experimental results shown in Fig. 8c.
Using (11)-(20) the α-β components of the reference currents are calculated by the DSP platform and used as inputs to a resonant control system. The tracking error achieved by the controllers is shown in the lower waveform of Fig. 8b. For the α-axis, the current is regulated with a settling time of about 12-15 ms meanwhile the regulation of the β-axis currents is achieved in <5 ms after the fault occurrence. According to the internal model principle [37], zero steady state error is achieved before and after the transient.
In Fig. 8c the active and reactive powers supplied to the grid are presented. Note that the reference currents are calculated (from (11)) to maintain the same active power P * g 0 during the whole test. In Fig. 8c the active power is free of low frequency ripple meanwhile the reactive power has a relatively large 100 Hz component.
In Fig. 8d the performance of the proposed LVRT control system, for a C type fault, is illustrated. The grid voltages are shown in the top waveform of Fig. 8d, with a 50% voltage reduction in two of the phases. The grid current waveforms, in α-β coordinates, are presented in the middle waveform of Fig. 8d. Note that this current has negative and positive sequence components obtained from (20). The active and reactive powers are shown in the lower waveform of Fig. 8d. In this case, after the fault, only reactive power is supplied to the grid and the active power reference is P * g 0 = 0 (Q * g 0 ≃ 1.2 kVAR). Again, the active power is supplied to the grid with a negligible ripple. As discussed in Section 3 the system does not have enough degrees of freedom to regulate the 100 Hz components of the reactive power. Therefore only the average value of Q * g 0 is controlled. Note that from the results depicted in Fig. 8, the tracking of the currents and powers has a 2% settling time of about 12-15 ms. This dynamic performance is very good considering the inherent control delay introduced by the DSC algorithm (see Section 3.2). In addition, because of the relatively large step-like current and voltage variations produced by the fault, the actuator (i.e. the power converter) may become momentarily saturated after the fault is applied, and this contributes to slightly reduce the dynamic performance of the system [38].

Conclusions
This paper has presented a new control methodology based on self-tuning resonant controllers and a fast convergence modified DSC algorithm, which can be used to separate the positive and negative sequence components of the unbalanced voltages and currents with a programmable delay. The proposed control system is simple to implement. It requires only two resonant controllers which can regulate the four degrees of freedom (i p a , i n b , i p a , i n b ) available in the system. The proposed control algorithm requires neither counter revolving d-q frames nor a notch filter to achieve sequence separation. As shown in this paper the LVRT algorithm is simple and can achieve very good dynamic response. Moreover, the modified DSC discussed in this paper, improves the dynamic response by reducing the delay required to separate the sequence components of the electrical signals.
The control system has been validated using a computer model implemented in PLECS ® and an experimental prototype. The system has been tested for several types of dip faults with excellent performance in all the cases.