Short-circuit fault analysis and isolation strategy for matrix converters

The behavior of matrix converter (MC) drive systems under the condition of MC short-circuit faults is comprehensively investigated. Two isolation strategies using semiconductors and high speed fuses (HSFs) for MC short-circuit faults are examined and their performances are compared. The behavior of MC drive systems during the fuse action time under different operating conditions is explored. The feasibility of fault-tolerant operation during the fuse action time is also studied. The basic selection laws for the HSFs and the requirements for the passive components of the MC drive system from the point view of short-circuit faults are also discussed. Simulation results are used to demonstrate the feasibility of the proposed isolation strategies.


Introduction
Although conventional voltage source converters based on AC-DC-AC structures have been well developed, the bulky and limited life-time dc-link capacitors can be a negative factor in some AC drive applications, especially in aerospace and military electric vehicle applications where space and weight, as well as high-temperature operation, are critical issues. In recent years matrix converters (MCs) have been increasingly attractive for these application areas [1−2].
In aerospace applications, good reliability is of great importance and continuous operation after faults can be one of the key points. Faults in motor drive systems include faults in motors, in power sources and in power converter components. All will affect the normal operation of motor drive systems. However, the faults in the power converter are the focus of this work.
A number of studies have been undertaken to deal with open-circuit faults in MCs. Several effective methods to manage open-circuit faults have been proposed [3−11]. However, very few papers consider MC short-circuit faults. In the literature, a couple of papers just briefly say that the protection mechanisms should be actuated to safely stop the system under short-circuit faults in MC switches [12−13]. No papers consider the behavior of MC motor drive systems under switch short-circuit faults.
The short-circuit fault isolation strategies and fault-tolerant operation for MC were described in Refs. [14−15]. In Ref. [14], three bidirectional switches, which connect the load input terminals to the supply neutral, and three fast acting fuses, which are connected in series with each of the MC output terminals, are used. In this method, once a shorted-switch fault is detected, all the gate signals for the faulty MC phase will be turned off. At the same time the connecting switch to the faulty phase is turned on to blow the corresponding fuse. The faulty MC phase is then isolated from the motor. The connecting switch continuously conducts during the post-shorted failure operation. In Ref. [15], in order to get rid of the need for the supply neutral, line-to-line input voltages are used to blow the fuses, at the expense of adding six TRIACs and six fast-acting fuses. After the right fuse is blown, the fourth leg replaces the faulty leg. Then, the reconfigured MC is operated as a healthy full MC. However, since two fuses are used in the isolation circuit, a disaster may be induced if the wrong fuse blows first. The selection rules for the fuses and the method to solve this problem are not mentioned. Furthermore, Refs. [14−15] did not tell what should be done to secure the safety of the drive system during the fuse action time. The I 2 t values of fuses are usually larger than those of IGBTs at the same ratings. Overcurrent and overvoltage stresses on both faulty and healthy devices can be caused by uncontrollable shorted circuit during the fuse action time. It is therefore important to understand the post-fault operation of the converter during the period before the fuses are blown.
This work starts with the presentation of comprehensive analyses of the short-circuit faults in MC drive systems. Then, two short-circuit fault isolation strategies are described. Their isolation performance is analyzed and compared. The behavior and characteristics of a MC-PMSM drive system during the fuse action time are explored. The feasibility of fault-tolerant operation during the fuse action time is also considered. The basic selection laws for HSFs and the requirements for the passive components of a MC drive system from the point view of short-circuit faults are summarized. The effects and the feasibility of the proposed isolation strategy are then verified, stressing the practical aspects in a typical MC-PMSM drive system. However, detection of short-circuit faults is not the focus of this work and it assumes that the device short-circuit fault is accurately detected and located by a fault diagnosis technique described in another of our papers.

Operation of three-phase MCs under normal conditions
A typical three-phase MC-PMSM drive system is shown in Fig. 1. The input filter in the figuration, merged with the impedance of the source, is used to attenuate the high-frequency switching harmonics in the input currents. The clamp circuit protects the power switches from overvoltage that occurs during transients and provides a current path under faulty operations. The bidirectional switch in MC is the common-emitter configuration of an anti-series connection of two standard insulated-gate bipolar transistors (IGBTs) with anti-parallel diodes.
Due to lack of space, this work focuses on faults in IGBTs. Several types of faults can appear in these IGBTs. They can be broadly categorized as open-circuit faults, short-circuit faults, and intermittent gate-misfiring faults [16−17]. This work will focus on short-circuit faults.
For the case of a short-circuit fault in an MC, we may have a short circuit in only one of those IGBTs (faults F1 and F2 in Fig. 1) or a short circuit in both IGBTs of the same bidirectional switch (fault F3). The superscript "F" in Fig.1 denoting "forward" refers to current flowing from the supply side to the load side, while the superscript "R" denoting "reverse" refers to the opposite direction.
For the sake of completeness of this work and for an easy understanding of the faulty operation of an MC, the basic mathematical relations that rule the normal operation of an MC will be presented first, proceeding afterward to the analysis of the operation of the MC with a short-circuit fault.
In normal condition, each output phase of the converter can be connected to any input phase voltage for a period of time, depending on which switch is turned on. Therefore, the output voltages of the MC can be expressed in terms of the input voltages and the switching states of the nine bidirectional switches, as given in Eq. (1).
where U A , U B , U C and U a , U b , U c are the output and input voltages, respectively; S jk (j=A, B, C and k=a, b, c) represents the switching state of each bidirectional switch connected between the input phase "k" and the output phase "j" of MC. Note that S jk is defined as "1" or "0" when the switch is turned on or turned off, respectively. Fig. 1 Configuration of MC-PMSM drive system and potential types of IGBT short-circuit fault Likewise, the input currents (after the input filter of converter) can be estimated by where i A , i B , i C and i a , i b , i c are the output and input currents, respectively.
Since the MC is supplied by a voltage source, the input phases must never be shorted, and due to the inductive nature of the motor, the output phases must not be left open. This basic operating principle of the converter can be expressed as In order to get the switching state of each bidirectional switch, different modulation strategies have been proposed. The most popular modulation schemes are the optimum AV (OAV) method, the SVM method and the carrier-based PWM method. Due to the lack of space and for simplicity of analysis, only the investigated knowledge based on the SVM method is presented in this paper.

Operation of three-phase MCs under faulty conditions
Equations (1)−(3) are valid as long as all switches of the MC do not experience any fault. When a fault appears in MC, those relations do not remain valid.
To better understand the effect of a single switch shorted fault, the supply voltages are divided into six intervals as shown in Fig. 2, and take the following conditions as an example.  2) Neglect the threshold voltage requirement of the diodes.
3) Suppose that the voltages U a , U b , U c at the input terminals of the MC are sampled as the input voltages for SVM calculation.

Short-circuit faults (F1 and F2 types)
Since the analysis of the MC behavior under F1 and F2 faulty conditions is similar, F1 type fault is taken as an example. 3 will happen. The high current has two main sources: 1) the discharging current of the capacitors of the input filter, as shown in Fig. 3(a); 2) the short-circuit current between two supply voltages, as shown in Fig. 3 The first source only lasts a very short time. But it can arouse a very large surge current limited only by the impedance of two capacitors, two diodes and one IGBT. And its discharging time is decided by the voltages and capacitance of two filter capacitors and the resistance in the circuit. In order to prevent damages caused by this surge current, capacitors with low capacitance is preferable for the input filter. And the components involved in these short circuits should be designed to endure these surge currents.
The second source also leads to a very large current limited mainly by the impedances of the series part of the input filter, which are generally very low in order to get a small voltage loss. Comparatively, the current caused by the first source is much higher than that by the second source.
As a consequence of the short circuit between two input voltages, both U a and U b deviate from their normal values towards (U sa +U sb )/2. The output voltages of the two healthy phases will also be affected if they are commanded to connect with the input phase a or b. The result is the distortions of the load voltages and currents, during intervals 1−2. Figure 4 shows the behavior of an open-loop controlled MC-RL system under the condition of short-circuit failure of . If S Ab keeps being on during the next switching state, the effects caused by the second high current source will continue. As for the first high-current source, whether it continues or not depends on whether U a and U b equal each other.
If S Ac is turned on during the next switching state, the same situations will happen to the input phases a and c like the aforementioned situations happen to the input phases a and b.
However, if S Aa is turned on during the next switching state, the short circuit at the input side will be broken. The abrupt interruption of the high short-circuit current will cause high induced voltage across the series inductors. This results in overvoltage both on the input side and the output side, as shown in Fig. 4 Small resistors in parallel with the input filter inductors help to suppress the overvoltage. But small resistors will decrease the filtering effect. From this sense, the filter inductors with a small inductance again are preferable aside from the consideration of a small voltage loss on the input filter. Compare the simulation results in Fig. 4 and Fig. 5 with a 63 μH and 630 μH input filter inductor respectively. It can be seen that the situation of overvoltage on the MC input side and overcurrent of the motor are much better with a smaller input filter inductor.
Of course, the overvoltage will be finally clamped by the clamp circuit. But, if the above situation is not stopped in time, the rise of the clamp capacitor voltage will be inevitable because of the extremely high short-circuit currents, as shown in Fig. 4(d) and Fig. 5(d). Since the discharging time constant of the clamp capacitor is generally limited, over-rise of the clamp capacitor voltage will finally invalidate the overvoltage protection function of the clamp circuit and put the components at the risk of overvoltage damage. with an open-loop controlled RL load, f out =100 Hz, input filter parameters: In conclusion, during intervals 1−2, under the condition of a short-circuit fault in , F Aa S high shortcircuit currents and overvoltage on the input side, overcurrent and overvoltage on the output side, violent oscillations of the motor torque, severe vibration of the motor speed will be caused if the MC drive system is controlled without variation. If closed-loop motor control methods are used, the situations will get even worse. Figure 6 shows the behavior of a closed-loop controlled MC-PMSM drive system under the condition of short-circuit failure of .

S
It can be seen that the overvoltage and overcurrent on the input side, the overvoltage of the clamp capacitor and the motor operation are all get worse than the case of a RL load. So, in the analysis behind, intervals 1−2 are called "severe intervals" of the witch .
F Aa S Likewise, the "severe intervals" of other switches are listed in Table 1 denoted by "××".
From the above analysis, it can be concluded that once a short-circuit fault is detected in the "severe intervals", the first thing that should be done is to prevent the formation of short circuits on the input side to avoid damages caused by huge short-circuit currents and its byproduct overvoltage. The often used method is to turn off the gate signals of all the IGBTs in the faulty MC phase immediately. However, since the output phase and the input phase have a fixed connection by the faulty IGBT, an uncontrollable situation can be induced during the "severe intervals" if the faulty switch is not cleared from the circuit. For example, the output phase-A has a fixed and uncontrollable connection with the input phase-a by the faulty F Aa S during intervals 1−2. This condition makes the motor phase-A have the highest voltage during intervals 1−2. It results in a fact that a non-negative phase-A current will be generated no matter what the voltages of the other two motor phases and the motor neutral point are. It will put the PMSM drive system in an uncontrollable and dangerous operation, especially under closed-loop control. The motor will run in a mess and let alone fault-tolerant operation. The best option is to isolate the faulty switch as soon as possible. This condition will be in effect for one third of the power supply cycle. For the power supply at 50 Hz, it is 6.7 ms. 3.1.2 Phase angle of supply voltages presently located in intervals 4−5 During intervals 4−5, U sa has the lowest value. No matter S Ab or S Ac is on or off, the short circuit between two input voltages is prevented by the reverse blocking capability of the diode F Aa D in series with the faulty .

S
So, if the short-circuit fault of F Aa S happens in these intervals, neither will high short-circuit currents appear on the source side nor will the distortions happen to the load voltages and currents during these intervals,   Table 1 denoted by "o". In "safe intervals", since no malfunction characteristic is shown, fault detection will be delayed until supply voltage phase goes out of these intervals.

Phase angle of supply voltages presently located in intervals 3,6
The common feature of intervals 3 and 6 is that U sa has the medium value among three supply voltages. In interval 3, U sb is larger than U sa and U sa is larger than U sc , while in interval 6, U sc is larger than U sa and U sa is larger than U sb . Take interval 3 as an example for analysis. Similar behavior occurs in interval 6.
During the interval 3, when R Ab S is on, the short circuit between a and b input voltages is prevented by the reverse blockage of is on, the short circuit between a and c input voltages will be created. Like the situations in intervals 1−2, high short circuit currents will occur on the input side and distortions will appear on the load voltages and currents no matter are in the direction of the load current. If R Ac S keeps being on in the next switching state, the high short-circuit currents on the input side and the distortions of the load voltages and currents will continue. If S Aa or S Ab is turned on during the next switching state, the short circuit on the input side will be broken. Again overvoltage will be incurred on the input and output sides of the MC and consequently the load current will be distorted. But the situations are less severe than the situations in intervals 1−2 because the value of U sa is lower and overvoltage on the input side only occurs in a and c phases in interval 3, as shown in Figs. 4−6.
So, under the condition of a short-circuit fault in , F Aa S intervals 3 and 6 are called "less severe intervals" of .
F Aa S They also last one third of the power supply cycle. Likewise, the "less severe intervals" of other switches are listed in Table 1 denoted by "×".
For an AC motor load at high speed, the contradiction of the large back EMF of the motor and the low voltage output capability of the faulty MC phase makes the fault-tolerant operation very hard in "less severe intervals". In order to avoid the formation of the short circuits on the input side, only two of three input voltages can be utilized to synthetize the output voltage of the faulty leg. For example, under the condition of a short-circuit fault in F Aa S during the interval 3, only U a and U b can be used to synthetize the output voltage U A . So, during the interval 3-A, only positive voltage is available for U A . And its amplitude range is very limited, especially during the beginning period of the interval 3-A. During the interval 3-B, the available voltage range of U A becomes wider and a small negative value becomes available. But, compared with the normal condition, the available U A voltage is still very limited until at the end of interval 3-B.
If the gate signals of all the IGBTs in the faulty MC leg are turned off immediately once a short-circuit fault is detected, the short-circuit currents on the input side and their bad effects on the whole MC drive system can be avoided. Again, since the output phase-A has an uncontrollable connection with the input phase-a by the faulty , F Aa S uncontrollable currents circulating in motor windings will be incurred if the back EMF of motor phase-A is different from the voltage U a .
In conclusion, under the condition of F1 or F2 fault type, fault-tolerant strategies can hardly be implemented without isolating the faulty switch from the circuit during "severe intervals" and "less severe intervals". Only during "safe intervals" which only cover one third of the power supply cycle, operation can be continued without sacrificing the performance of the MC drive system. Under the case of a heavy load with small inertia, continued and less violent operation is nearly impossible. So, in order to get sustainable and slightly milder faulttolerant operation, the most important thing that should be done is to clear the faulty switch from the circuit as soon as possible.

Short-circuit faults (F3 Type)
This fault type combines the effects of F1 and F2 types. The "severe intervals" cover the summation of that of F1 and F2 types. And there are no "safe intervals" anymore. For example, intervals 1−2 and 4−5 are all "severe intervals" for S Aa . The remaining intervals 3 and 6 are "less severe intervals". That is to say two thirds of the power cycle is "severe intervals" and one third is "less severe intervals".
According to the above theoretical analysis, fault-tolerant operation is infeasible with the faulty switch remaining in the circuit in "severe intervals". In "less severe intervals", restricted by the limited safe switch combinations, the available voltage range of U A is very limited. PMSM fault-tolerant operation at high speed is infeasible due to the contradiction of the large back EMF of the motor and the low voltage output capability of the faulty MC phase.
The conclusion is that for faults of F3 type, faulttolerant operation is not a practical way out. In next section, it indicates that the practical way is to stop the whole drive system and isolate the faulty bidirectional switch as soon as possible. Only after the faulty switch is isolated from the converter, fault-tolerant strategies can be considered.

Short-circuit isolation method 4.1 Traditional short-circuit fault isolation structure
The structure in Fig. 7 was proposed in Ref. [14], which employs three connecting devices (T A , T B , T C ), which are TRIACs or back-to-back connected SCRs, and three HSFs (F A , F B and F C ). T A , T B and T C are open and do not appear in the circuit in normal operating condition. In Ref. [14], it is only briefly said that once a single switch short-circuit fault is detected, the system controller automatically commands to open the other IGBTs in the faulty phase to avoid the short circuit of two supply voltages. The connecting device linked to the faulty phase is fired at the same time. As a result, the short circuit is constructed through the input voltage, the faulty switch, the fast-blow fuse and the connecting device. Therefore, the fuse blows and clears the phase with the faulty switch from the converter. The connecting device is forced to continuously conduct during the post-shorted failure operation. By regulating the output voltages and currents in the two remaining phases with the magnitude increased by 3 and the phase shifted by 30° away from the axis of the faulty phase, three-phase balanced sinusoidal output currents in the load motor can be generated.
However, KWAK and TOLIYA [14] does not give clues about how to control the MC drive system and the behavior of the MC drive system during the fuse action Fig. 7 Traditional short-circuit fault isolation structure time. Normally, only a few microseconds are needed to open IGBTs, while usually longer time is needed to break a HSF with the same ratings. And IGBTs have much smaller I 2 t values than HSFs and nearly have no overvoltage endurance capability. So, for the safety of the system, it is very necessary to investigate the behavior of the MC drive system during the action time of the HSF.
Again consider the case that a short-circuit fault occurs in .
F Aa S Assume that S Ab and S Ac have been opened and T A has been closed. As a result, during the positive half cycle of U sa , there will be a high shortcircuit current circulating in (supply neutral) to melt the fuse-link (R fa //L fa denotes the parallel circuit of R fa and L fa ). Since under the unmelted status, the fuse resistance is very small (the resistance of a 200 A fuse in size 30 is lower than 10 mΩ). So, the connecting device is T A . Most of the supply voltage drops on the input filter inductor. The voltage U a at the input terminal of the MC drops to a very small value, as shown in Fig. 8(a). The operation of the two healthy MC phases will be affected inevitably. This condition is in effect during the entire positive half cycle of U sa .
In practice, due to the filter inductor, the duration of this condition is extended to a time longer than the positive half cycle of U sa . The extended duration is determined by the current amplitude and the ratio of the inductance by the resistance in the short circuit. Figure 8(a) shows a worst situation that the switch shortcircuit fault happens at the beginning of the positive cycle of U a . Nearly one fourth supply cycle is extended for the parameters listed in Table 2. The larger the filter  inductance is, the worse the situation is. Under the condition of a RL load, the modulation method used under normal condition should be revised to adapt to the severe imbalance of the input voltages. Traditional SVM method, traditional Venturini modulation method and traditional direct duty-ration PWM (DDPWM) are not applicable any more since they intrinsically assume a balanced three-phase supply and a balanced three-phase output. Even though a viable modulation method based on instantaneous values could be found, the output capability of the MC is very limited due to the great voltage drop of U a .
Under the condition of a motor load (PMSM or IM), large voltage difference between the motor back-EMF at high speed and the decreased MC output voltage capability will cause uncontrollable large motor currents. Figure 8 shows some results under the condition of a PMSM load with the application of the unchanged control and the traditional SVM method. In hundreds of microseconds, the motor currents rise to more than two times its rated current. The large currents will probably actuate the protection mechanisms to stop the system before the fuse blows. So, the relatively safe way for motor load is turning off the whole MC by turning off all the gate-drive signals during the fuse action time. Figure 8 is just used to show the perceived behavior of the MC drive system during fuse action, assuming that the fuse is under the unmelted status all the time.
However, even if the drive system is completely shut off by turning off all the gate-drive signals during the fuse action time, large current circuiting in motor stator windings should also be paid attention. Though the clamp circuit provides a free-wheeling path for motor currents, the kinetic energy stored in motor rotor can not be completely released immediately. So, PMSM will act as a generator. Large current spikes, several times or even more than ten times the rated motor current, will occur due to the voltage difference between the back EMF and the voltage of the supply neutral point or DC-side voltage of the clamp circuit, as shown in Fig. 9. Fortunately, the duration of the large current spikes is very short, a maximum of 15 ms in the simulation. And they circulate in the motor windings, the clamp circuit and the connection device. At the design stage, these current spikes should be taken into consideration.
At this point, a conclusion can be reached that, for the isolation structure in Fig. 7, during the fuse action time, fault-tolerant operation is nearly infeasible for motor load. Unexpected large current may be caused by the back EMF of the motor at high speed and the decreased voltage output capability of the MC. Even if the whole MC is turned off, large current spike still maintains a threat. Since motor speed is uncontrollable during this time, the back EMF of the motor is uncontrollable. Consequently, the large current spikes are uncontrollable. So, the best way out is to turn off the whole MC and isolate the faulty switch as soon as possible. After the failure phase is cleared out from the main circuit, fault tolerant operation can be put into practice.

Proposed short-circuit fault isolation structure
In order to isolate the faulty switch immediately, a new structure for isolating short-circuit fault is proposed, as shown in Fig. 10. Six SCRs and two resistors are added on the base of the structure in Fig. 7. S jp (j=A, B, C) and R p are used when a short-circuit fault locates in the forward switch S jk , while S jN (j=A, B, C) and R N are used when a short-circuit fault locates in the reverse switch S jk .
For example, once the short-circuit fault in F Aa S is detected, the system controller immediately commands to open S Ab and S Ac and turn on T A and S Ap . As a result of the above operation, high current will be induced in the fuse F A . The high current has four main sources: 1) the discharging current of the capacitors of the clamp circuit; 2) the short-circuit current through Due to the four sources, there is always high current circulating in F A during the whole power cycle until the fuse-link breaks, not like the case with the structure in Fig. 7 that high current circulates only during the positive half cycle of U a .
The first current source acts at the closing instant of S AP . The second current source works through the faulty switch during the positive period of U a . The third current source is ignited through the clamping-circuit diode and the switch S AP during U sb is the maximum value among three supply voltages. The fourth current source is activated through the clamping-circuit diode and the switch S AP during U sc being the maximum value among three supply voltages. And the first two current sources can act together with the other current sources.
The interaction result of the four main current sources is high-current incessantly circulate in F A during the whole power cycle until the fuse-link breaks. Consequently, the fuse can be blown more quickly.
During the fuse action time, turning off the whole MC or executing the fault-tolerant operation strategy depends on the failure occurring time. During the positive period of U a , U sa provides the melting energy and the voltage U a at the input side of the MC will also drop greatly like the situation of the structure in Fig. 7. The operation of the other two phase-legs will also be inevitably affected. Figure 11 shows some simulation results of the structure in Fig. 10, assuming that the switch short-circuit fault occurs at the beginning of the positive cycle of U a and that the unchanged closed-loop PMSM control with traditional SVM is used during fuse action period.
Comparing Fig. 11 and Fig. 8, it can be seen that the voltages on the input side of MC and the motor behavior during the fuse action time are similar for two isolation structures.  Fig. 7 only circulates during the positive period of U a and its amplitude is decided by the amplitude of U a . However, there is always high current circulating in the fuse of Fig. 10 and always the maximum one works. The significance of this feature makes it possible that the short-circuit fault can been cleared from the system as soon as possible if the short-circuit fault occurs during the intervals 3−6.
So, for the isolation structure in Fig. 10, if short-circuit faults occurs during the positive cycle of U a , the best option still is turning off the whole MC during the fuse action time. After the faulty switch is cleared from the circuit, the fault-tolerant operation strategy is started to work.
However, if the failure occurs during the negative cycle of U a , the fault-tolerant operation strategy stated in [14] can be triggered to work during the fuse action time. This feature is very conducive for the continuous motor operation and the stabilization of the motor torque and speed after switch faults. But it should take can when this feature is utilized in practical applications. In high power applications, high power rating HSFs should be used, which need more melting energy. If HSFs can not be blown during the present negative cycle of U a , the fault-tolerant operation strategy can not be used uninterruptedly during the fuse action time.
R p and R N are added to suppress large voltage drops on the input filter so that the fault-tolerant operation of the system can not be affected while using the other two supply voltages to melt the fuse. The values of R p and R N are set according to the impedance of the series part of the input filter at the power fundamental frequency in order for limiting the voltage loss caused by it. So, the proposed isolation structure is more applicable to the MC drive system with a small input filter. Fortunately, only small input filter is needed for MC drive systems, which is one of its advantages over the traditional AC-DC-AC converters and back to back converters.

Verification results
The validity of the proposed isolation strategy was verified through the developed Matlab/Simulink model of a 14 kW MC-PMSM drive system. The parameters are listed in Table 2. An indirect SVM technique was adopted to control the MC, along with a four-step commutation strategy in the simulation model.
According to the parameters of the MC-PMSM drive system, 250 V/50 A Bussmann HSFs FWX50 is selected, the current rating of which is greater than the starting current of the motor and an allowance of around 15% is provided in order to avoid nuisance blowing. Though a fuse with a bit smaller rating is more eligible, FWX50 is selected without loss of generality. According to the datasheet, the pre-arcing i 2 t of FWX50 is 100 A 2 ·s, while its clearing i 2 t at 250 V and at power factor of 15% is 520 A 2 ·s. For lower voltage or higher power factor, the clearing i 2 t should be corrected by a correction factor less than 1. Here we use the clearing i 2 t of 520 A 2 ·s to estimate the needed clearing time conservatively. After checking, its arc voltage, current rating and breaking capacity all satisfy the requirement of the MC-PMSM drive system in Table 2. In the simulation, the fuse is modeled as a constant impedance with R fuse =0.001 Ω, L fuse =10 nH [18] without considering its current limiting effect.
Prior to the artificial short-circuit fault, the system is in steady state, with the speed regulated at 1600 r/min under a 75 N·m load. At some instant, F Aa S is shorted by the program to produce the phenomenon of a short-switch fault. In order to compare the performance of two isolation structures, ten different triggering moments of the artificial short-circuit fault are set, as shown in Fig. 12. The unrestricted currents circulating in the fuse of the two isolation structures are shown in Fig. 13 and Fig. 14, which does not consider the current limiting effect of the fuse and assumes the unmelted status of the fuse all the time. In fact, when fuse begins to melt, its resistance will rise. When the fuse is blown, it has infinite resistance in theory. So in fact, the actual fuse current peak won't be so large and won't last so long as     Figures 13 and 14 again assume that the switch short-circuit fault happens at the beginning of the positive cycle of U a . When the switch short-circuit fault happens at other moments, the waveform of the fuse current during the beginning phase will be different. The time needed for fuse pre-arcing and clearing for the traditional isolation structure and the proposed isolation structure at different fault triggering moment is listed in Table 3.
From the simulation results, it can be seen that time needed for the proposed isolation structure is less than that for the traditional isolation structure in general. It is consistent with the previous theoretical analysis. Big difference between two isolation structures occurs in interval 3. For the traditional isolation structure, the accumulated energy during the present positive period of U sa in interval 3-A is not enough to clear the fuse. So, fuse clearing is delayed to next positive period of U sa . In interval 3-B, the current path to melt the fuse is blocked by the reverse blocking capability of the diode in series with the faulty IGBT, so fuse clearing is also delayed to next positive period of U sa . But for the proposed isolation structure, fuse is cleared instantly with the melting energy provided continually by the other two supply voltages.
In safe intervals 4−5, short circuit between two supply voltages is prevented by the reverse blocking capability of the diode in series with the faulty IGBT, no failure symptom is shown. So, there is a time delay for the fault detection for both isolation structures. Fortunately, in "safe intervals", no dangerous situation will be induced. Once the fault is detected, time needed for the proposed isolation structure is again less than that for the traditional isolation structure. For the sake of the circuit safety and continued post-fault operation, the shorter the clearing time is, the better it is. In this respect, the isolation performance of the proposed isolation structure outweighs the traditional isolation structure.
Moreover, it can be seen from the simulation results that, for the proposed isolation structure with the motor system in Table 3, it is possible in most situation to isolate the short-circuit fault from the system before it enters into "severe intervals". It is very important for the safety of the system and post-shorted failure operation.
The disadvantage of the proposed isolation structure is requirement of six more unidirectional switches. However, increase in hardware is over the evil effects caused by short-circuit faults. For higher power applications, the advantage of the proposed isolation structure will be weakened.

Conclusions
1) Comprehensive analyses of switch short-circuit faults in MC drive systems are presented. From the analysis of the effects of short-circuit faults, it is pointed out that fault-tolerant strategies can hardly be implemented without isolating the faulty switch from the circuit during "severe intervals" and "less severe intervals".
2) Two isolation structures for MC switch shortcircuit faults are investigated and their performances are examined. As for the shorter action time, smaller possibility of IGBT rupture, higher safety of the system, and higher possibility of post-fault continued operation, the new isolation structure proposed has the better performance than the traditional isolation structure.
3) The feasibility of fault-tolerant operation during the fuse action time is also studied. For the traditional isolation structure, fault-tolerant operation during the fuse action time is infeasible. For the proposed isolation structure, the feasibility of fault-tolerant operation during the fuse action time depends on fault occurring moments and the power ratings of the applications.
4) The basic selection laws for HSFs and the requirements for the passive components of MC drive systems from the point view of short-circuit faults are summarized.
5) Simulation results demonstrate the feasibility of the proposed isolation structure on the simulation platform of MC-PMSM drive system.