A Novel Zero-Sequence Current Elimination PWM Scheme for an Open-Winding PMSM With Common DC Bus

This paper introduces a novel pulsewidth modulation (PWM) scheme for an open-winding permanent magnet synchronous machine (OW-PMSM) driven by dual two-level three-phase inverter with common dc bus, which can effectively deal with the inherent zero-sequence current (ZSC) problem. Based on the conventional symmetrical unipolar double-frequency sinusoidal PWM scheme with an appropriate phase shift, the common mode voltage (CMV) of two inverters remains same and cancel out each other to eliminate the modulated zero-sequence voltage (ZSV) disturbance source. In this case, the double-frequency effect can be retained to reduce the ac side current ripple and suppress both corresponding motor vibration and acoustic noise, which is advantageous to improve the synthetic performance of motor. The dc-bus voltage utilization of the novel PWM scheme is proved to reach the same maximum value comparing to the conventional modulated ZSV elimination scheme. Meanwhile, a zero-sequence controller is designed to suppress ZSC by further adjusting the two CMVs to counteract other zero-sequence disturbance sources. To verify the analysis, the proposed PWM technique associated with the control method is implemented in an OW-PMSM experimental setup to validate the superiority of the proposed method.


I. INTRODUCTION
PWM-inverter-driven ac motors have become common in variable speed applications due to various advantages, such as high efficient, high dynamic performance and low harmonic distortion.Compared to conventional three-phase starconnected winding motor, open winding (OW) motor has the potential fault-tolerant capability because each phase current can be controlled separately [1] [2].Moreover, the OW motor can be fed by dual-inverter which has higher DC bus utilization than the conventional single inverter fed starconnected winding motor and can reduce the voltage stress for power devices, so the dual inverter fed OW motor topology is favorable for the occasion that motor voltage is higher than DC link voltage.With the above advantages, OW motor drives are widely used in electric vehicles [3] [4], wind generation systems [5] [6] and aircraft starter-generator [7].In addition, the dual two-level inverter can generate three-level phase voltage which has similar effect with the three-level inverter [8], but it has obvious advantages-the simple structure without neutral point clamping diode, the absence of neutral point fluctuation, and the flexibility and redundancy of space vector combinations [9].So the dual inverter fed OW motor topology has the superiority comparing to the conventional three-level inverter fed star-connected winding motor topology.
However, owing to the opened neutral point of stator winding, the zero-sequence path in the motor emerges and the potential zero sequence current (ZSC) can be generated.Considering the power supply mode, the dual inverter usually can be fed by two isolated DC powers [10] [11] or single DC power [9] [12] [13].The two isolated DC powers can block the zero-sequence path in OW motor naturally and suppress the ZSC, the structure is shown in Fig. 1(a).Though this method can be adopted, the two isolated DC powers lead the system bulky and increase the cost.So in some occasions with the requirement of power density and cost, the single DC power fed dual inverter is preferred.When the single DC power is utilized shown in Fig. 1(b), the ZSC may has the possibility to be generated and consequently causing unwanted power losses, torque ripple which degrades the system performance [14]- [17].Moreover, considering the type of OW motor, it can be roughly divided into two categories, i.e. the OW induction machine (OW-IM) and OW permanent magnet synchronous machine (OW-PMSM).Comparing to the OW-IM, the OW-PMSM is attracting more and more research attentions [14]- [19] [22] recently due to high efficiency, high torque density, and high power factor.For conventional OW-IM, the zero sequence voltage (ZSV) which is the source of ZSC is mainly caused by the differences of CMVs between two inverters.If the CMVs decided by the modulation scheme keep identical in every switching cycle, the ZSC can be limited in this case [9] [13].Meanwhile, the inverter nonlinearity is regarded as another ZSV disturbance source of inverter [23].The above two disturbance sources can be attributed to the inverter system.As for OW-PMSM, except for the above two ZSV sources, the OW-PMSM may induce the ZSV in the back Fig. 1 The structures of dual two-level inverter fed OW motor: (a) with two isolated DC power, (b) with common DC power IEEE POWER ELECTRONICS REGULAR PAPER/LETTER/CORRESPONDENCE electromotive force (EMF) which may be a pivotal disturbance source of motor [15] [16].In addition, the ZSV generated by the cross coupling effect in zero-sequence circuit is another disturbance source of motor [19].So the ZSV disturbance sources for the dual inverter fed OW-PMSM is more complicated than the OW-IM generally, and it should take more effort to control ZSC for OW-PMSM.
In order to suppress the ZSC, the modulation scheme combined with the corresponding control method should be implemented.Considering the elimination of the major ZSV disturbance source caused by the modulation scheme, the special designed PWM schemes which generate two identical CMVs for each inverters can be utilized [9][12] [13].In this case, the simple and popular ZSV elimination schemes based on two-level three-phase inverter modulation schemes can be implemented, e.g. the traditional SVPWM (space vector PWM) and DPWM (discontinuous PWM) with PWM signal rotation [19]- [21].With the elimination of the major ZSV source of inverters, the ZSC can be relatively easy to be suppressed.In order to further reduce the ZSC, the freedom of zero vector redistribution is often utilized to adjust the output CMVs of two inverters [15] [18]- [20] to counteract other ZSV disturbance sources.
The essential ideal of the most utilized ZSV elimination method based on the SVPWM scheme is SPWM (sinusoidal PWM) scheme with zero-sequence signal injection for one inverter [24] and the PWM signal rotation which can guarantee the same PWM signals for two inverters [15] [18]- [20].However, with the manner of PWM signal rotation, the dual inverter composed of six phase-legs is only driven by three different PWM signals.In this case, the duty cycles for one stator winding connected two phase-legs are coupled and cannot changed separately.So the freedom of the dual inverter is relatively reduced which may degrade of the PWM relevant performance, for instance, the most concerned current ripple of phase current in motor.The current ripple not only generate the copper and iron loss, but also induce the high frequency harmonic magnetic fields and corresponding electromagnetic force which further produce the adverse effect of electromagnetic vibration and acoustic noise in PMSM drives [25][26][27][28][29].So it is critical issue to reduce the current ripple and improve the synthetic performance of motor.
Actually, the duty cycles can be controlled separately for each phase-legs and the current ripple performance has the possibility to be optimized.For example, the unipolar SPWM scheme can control the duty cycles separately for each phaselegs and fully utilize the freedom which has the potential to obtain the double frequency effect.What's more, the threephase unipolar SPWM scheme for dual inverter can keep the average CMV of each inverter zero naturally, so it has the possibility to coordinate with the OW motor, the only problem is the six PWM signals taking the symmetric manner and generating the instantaneous ZSV pulses.So the modified method could be considered to eliminate the high frequency ZSV pulses.Since the phase-shift of voltage pulse is an optional freedom which can adjust the position of PWM signal in one switching cycle [30], the unipolar double frequency SPWM scheme can coordinate with proper phase-shift to eliminate the average and instantaneous ZSV [31] as well as optimize the current ripple of phase current.This paper is based on the above thinking and provides a complete scheme for the OW-PMSM with common dc bus.
The rest of this paper is organized as follows: in part II, the mathematical model of OW-PMSM with common dc bus is analyzed, and the zero-sequence equivalent circuit with the synthetic disturbance model is analyzed.In part III, the conventional ZSV elimination scheme based on the SVPWM is briefly investigated, and the principle of the novel ZSV elimination method based on the proposed modulation scheme is introduced and compared with the conventional SVPWM based method.In part IV, the OW-PMSM control method which includes the zero voltage vector adjustment based on the proposed ZSV elimination scheme and quasi proportional resonant (PR) controller is presented.The experimental results and validation are presented in part V. Conclusions are made in part VI finally.

A. The Mathematic Model of OW-PMSM
Based on the topology shown in Fig. 1(b), the phase voltage equations of the OW-PMSM can be expressed as where uk, ik, Ψk (k = a, b, c) are three phase voltages, currents and back EMFs, respectively.RS is the stator resistance.
The back-EMF of OW-PMSM usually contains the zerosequence harmonics (especially the third harmonic component) caused by the corresponding flux linkage harmonics.For a non-salient OW-PMSM, considering the dominated fundamental and third harmonic components of the rotor flux linkage, the flux equations can be expressed as where Lm1 and Lsσ represent the excitation inductance and leakage inductance of stator separately, M is the mutual inductance between two phase windings which is with negative value in three-phase symmetric PMSM, Ψf and Ψ3f are the amplitudes of fundamental and third harmonic flux linkage, ωe is electrical angular speed of motor, and θ1 is the initial angle difference between the fundamental and third harmonic flux linkage.
With the transformation matrix from the three-phase stationary abc coordinate frame to the synchronous rotating dq0 coordinate frame in (3), ) where the subscripts d, q, and 0 represent the components in dq0 frame, respectively.So in the OW-PMSM, the d-and qaxis inductances keep identical as Lm1+Lsσ-M, while the total 0-axis inductance is Lm1+Lsσ+2M.Since the mutual inductance M is negative, the 0-axis inductance is obviously reduced by mutual inductance which results in smaller inductance comparing to the d-and q-axis inductances, so ZSC is relatively easy to be excited by the ZSV disturbance source.
Thus, the voltage equation in dq0 frame can be written as: .
(5) where ud, uq, u0 represent d-, q-axis and zero-sequence voltages, id, iq, i0 represent d-, q-axis and zero-sequence currents respectively.In addition, with the above transformation matrix T3s/3r, the modulated ZSV u0 and ZSC i0 can be easily deduced and expressed as It can be seen that the ZSV and ZSC are the average value of three phase voltage and current, respectively.What's more, with the existence of ZSC and Ld=Lq, the electromagnetic torque [15] [16] in OW-PMSM can be expressed as where np is pole pairs of motor, T1 is the torque produced by q-axis current, and Tripple is the torque ripple produced by ZSC.
With the existence of third order harmonic current in ZSC, the six times fundamental frequency torque ripple will be generated which causes adverse effect for motor.Moreover, the ZSC also generates power fluctuation, induce the extra power loss for the system, and influences the full utilization of the VSI (voltage source inverter) capacity [15]- [17].Therefore, it is a critical issue for OW-PMSM with common dc bus to suppress the ZSC.

B. The Analysis of Zero-Sequence circuit model in OW-PMSM with Common DC Bus
In order to suppress the ZSC, the different ZSV disturbance sources should be recognized.The ZSV caused by the inverter system is first considered.For dual two-level three-phase inverter fed OW-PMSM, when taking the DC link middle point O as reference shown in Fig. 1(b), the pole voltage of all phase-legs can switch between Udc/2 and -Udc/2 with the DC link voltage of Udc.Generally, the CMV of VSI is the instantaneous average voltage of all phase-legs.So the CMVs of VSI1 and VSI2 can be defined in (9), where Ucm1 and Ucm2 are the CMVs of the two VSIs correspondingly, and VA1O, VA2O, VB1O, VB2O, VC1O, VC2O are the output instantaneous pole voltages.So the modulated ZSV disturbance source caused by the inverter system can be deduced as Since u0_PWM is the difference between the two CMVs of VSIs and decided by the modulation scheme, it has the possibility to be zero if two VSIs generate the identical CMV.Moreover, the inverter nonlinearity caused by the voltage drop of switching device and dead time effect can induce another ZSV disturbance source [23] which is also attributed to the inverter system.This ZSV disturbance source has strong correlation with the three-phase currents which can be modeled as the current control voltage source (CCVS) [19] and expressed as u0_nonlinearity=fn(ia,ib,ic).In addition, the motor side ZSV disturbance source should also be considered.The first obvious ZSV disturbance source is the third harmonic -3ωeΨ3fsin(3ωe-θ1) in back-EMF.The other ZSV disturbance source in motor side is the cross coupling voltages in zerosequence circuit caused by the d-and q-axis currents [19] which also have the CCVS characteristic and can be represented as u0_id=fd(id) and u0_iq=fq(iq).The detailed principle and expressions for the three CCVSs u0_nonlinearity, u0_id and u0_iq can be found in literature [17] and [19].
Based on the above analysis, the zero-sequence equivalent circuit model can be set up and shown in Fig. 2. The dual inverter generates two ZSV disturbance sources: u0_PWM and u0_nonlinearity, while the OW-PMSM induces the two kind ZSV disturbance sources: -3ωeΨ3fsin(3ωe-θ1), u0_id and u0_iq.As shown in (4), the zero sequence impedance based on L0 usually has small value, so the big ZSC can be easily induced by the ZSV disturbance sources.In order to suppress the ZSC, the promising controllable ZSV disturbance source should be determined.Generally, all the ZSV disturbance sources except u0_PWM are uncontrollable, but their amplitude could be limited with the optimal design of motor and compensation approach of inverter nonlinear.Contrary, u0_PWM is a directly controllable ZSV disturbance source decided by modulation scheme, and the amplitude can be controlled large enough to counteract others ZSV disturbance sources.So u0_PWM can be recognized as the promising ZSV disturbance source.With above analysis, in order to eliminate the ZSC, the core mentality is to modulate u0_PWM to zero with appropriate modulation scheme [26] first, and then counteract with other ZSV disturbance sources by fine-tuning the u0_PWM based on the ZSC closed-loop control.

III. THE NOVEL PWM SCHEME FOR OW-PMSM WITH COMMON DC BUS
In this part, the principle of conventional SVPWM based ZSV elimination scheme is first introduced; then the novel ZSV elimination modulation scheme based on the SPWM scheme and phase-shift manner is proposed; what's more, the characteristic and performance of the two schemes are investigated to make fair comparison finally.
For dual two-level inverter, each VSI can generate the same eight space voltage vectors shown in Fig. 3 Based on the combination of different voltage vectors for each VSI, the modulated ZSV of all voltage vector combinations can be calculated which has seven kinds of values shown in Table.I.For example, V15' means utilizing the voltage vector V1 of VSI1 and voltage vector V5' of VSI2 to synthesize the zero ZSV voltage vector because both VSIs generate the same CMV of -Udc/6.From Table I, it can be seen that there are total twenty voltage vector combinations which can realize the zero ZSV.These synthesized voltage vectors can be divided into two kinds: the zero voltage vectors which have no effect to synthesis of reference vector, and the effective voltage vectors which can be used to synthesize the reference vector.The all chosen zero ZSV voltage vectors in dual two-level inverter and the relationship to basic two-level inverters' voltage vectors can be drawn and shown in Fig. 4. In this case, zero ZSV can be realized if taking suitable arrangement of these special voltage vectors in every switching period.

A. Principle of Conventional SVPWM Based ZSV Elimination Scheme
The conventional ZSV elimination modulation scheme for dual-inverter can be deduced from SVPWM scheme  generated by modulation scheme can be eliminated in ideal condition.
Considering the average output pole voltage, the above schemes satisfy the equations: The space voltage vectors can be represented as: The included angle of the two voltage vectors is 120°, and the output resultant space vector ref V can be expressed as:

B. Principle of Novel ZSV Elimination Scheme Based on SPWM and Phase-Shift
In conventional symmetrical SPWM scheme (symmetrical sampling with one update of modulation signal per switching period), the three-phase duty cycles of VSI1 can be expressed as: where da1, db1 and dc1 are the three phase duty cycles, respectively; m is the modulation index within the range of (0, 1); θ is the instantaneous angle for phase A1.The above equations can deduce the identical equation (15) Since the phase voltage is the difference of the two phase-leg voltages, the corresponding two phase-leg voltages in one phase should keep the same modulation index and opposite phase to obtain the maximum output phase voltage, so the duty cycles of the corresponding two phase-legs should keep complementary.In this case, the relationship of duty cycles for each phase can be expressed as follows: where EpB1_f, EpC2_f, EpB2_r and EpC1_r are the rising and falling edge positions correspondingly.Considering ( 15), ( 16) and ( 17), the rising edges and falling edges can be proved to be equal shown in (19) and (20).Considering the voltage vectors combination, it can be found that all combined voltage vectors are changed to zero ZSV voltage vectors, while the time segment of this combined voltage vectors changes to asymmetrical which is different from the SVPWM based ZSV elimination scheme.According to the characteristic of the above manner, this modified scheme can be called as PS_SPWM (phase-shift SPWM) method.
In addition, considering the average output pole voltages, the above scheme satisfies the equations: The included angle of the two voltage vectors is 180°, and the output resultant space vector ref V can be expressed as: Thus, considering reference voltage combination for these ZSV elimination schemes, the different principles are shown in Fig. 7.For conventional SVPWM scheme, the relationship among the synthetic voltage vectors for each VSI and resultant voltage vector ref V has been deduced in ( 12) and ( 13), so the relative position for these voltage vectors can be drawn and shown in Fig. 7(a).As for the proposed PS_SPWM scheme, the relationship can be deduced in ( 22) and ( 23 In this case, the modulation index range for this two ZSV elimination schemes should make comparison.Fig. 8 shows the normalized phase and pole voltages for phase A (with the Udc/2 as reference) at the maximal modulation index for the two schemes.For conventional SVPWM scheme, the pole voltages are non-sinusoidal by injecting the zero-sequence component and the maximal modulation index can increase to 1.15.With the operation of signal rotation to cancel out the zero-sequence component, though the phase voltage can keep sinusoidal, the peak value of phase voltage only reaches the 3 times of pole voltage which is the value of Udc.So the actually maximal modulation index of phase voltage is 2 in this case.As for the novel PS_SPWM scheme, the phase-shift manner has no effect on duty cycle as well as the modulation index range, so there is no zero-sequence component injected in the pole voltage and the maximal modulation index is also kept 1 for the novel SPWM scheme.So the maximal modulation index of phase voltage can also reach the maximal value 2 which has the same value comparing to conventional scheme which proves the proposed PS_SPWM scheme would not reduce the modulation index range for dual inverter.What's more, the total harmonic distortion (THD) for this two ZSV elimination schemes should be considered.Fig. 9 shows the modulation index scanning result of phase voltage normalized switching harmonic for the two schemes.For conventional SVPWM scheme shown in Fig. 9(a), the phase voltage contains abundant odd and even switching harmonics.The dominated odd 1 st switching harmonic is monotonically increased which reaches the peak value 0.7359 at the maximum modulation index, while the dominant even 2 nd switching harmonic is non-monotonic with the peak value of 0.9667 at about half modulation index.As for the novel PS_SPWM scheme shown in Fig. 9(b), the phase voltage mainly contains the even switching harmonics and almost eliminate the odd switching harmonics.The dominated even 2 nd switching harmonic is also non-monotonic with the peak value of 1.066 which is close to the peak value of 2 nd switching harmonic for conventional SVPWM scheme.

(a) (b)
Considering the fact that the normalized phase voltage spectrum cannot directly judge the superior of the proposed PS_SPWM scheme, the equivalent current THD which is a universal indicator regardless the undetermined parameters can be calculated based on the normalized phase voltage spectrum and the corresponding harmonic orders, i.e.
Where n is the switching harmonic order.The result of the dominant equivalent switching harmonic currents and equivalent current THD are shown in Fig. 10.It can be seen that the equivalent current THD of the two schemes are close to each other when the modulation index is lower than 0.6, so the current THD reduction effect for the PS_SPWM scheme can be neglected in this range.When the modulation index is further increased, the equivalent current THD of the PS_SPWM scheme is smaller than the conventional SVPWM scheme, obviously in high modulation index range.The equivalent current THD of the SVPWM scheme is monotonically increased which reaches the peak value of 0.7738 at the maximum modulation while the equivalent current THD of the PS_SPWM scheme is nonmonotonic and the value is only 0.4184 at the maximum modulation index which means the equivalent current THD can reduce 45.93% comparing to the conventional SVPWM scheme theoretically.So it is obvious that the proposed PS_SPWM scheme has better performance than the conventional SVPWM scheme in high frequency current ripple reduction.

IV. THE OW-PMSM CONTROL METHOD BASED ON PS_SPWM SCHEME
With the above PS_SPWM scheme, the dominated ZSV caused by the modulation scheme can be eliminated in ideal condition, but the other ZSV disturbance sources which influence the ZSC should be considered.In this part, the ZSC closed-loop control method based on the zero voltage vectors adjustment for the proposed PS_SPWM scheme is introduced; then the corresponding OW-PMSM control method is proposed and summarized.

A. The ZSC Control Method Based on the Zero Voltage Vector Adjustment
In general, both the active and zero voltage vectors can affect the average output CMV.Based on the volt-second equivalent principle, the active voltage vectors with the corresponding dwell times are utilized to synthetize the reference voltage vector, so the dwell times of active voltage vectors are not suitable to adjust to change the average CMV.Contrary, the zero voltage vectors (000) and ( 111) are often utilized to fill the remaining time of the switching cycle, and the dwell times are adjustable, so the zero voltage vector Copyright (c) 2019 IEEE.Personal use is permitted.For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
adjustment is a freedom to control the average output CMV for VSI.For conventional SVPWM, the dwell times of two zero voltage vectors are equally divided.In order to suppress the ZSC in OW-PMSM, the dwell times of zero voltage vectors should be further adjusted in two VSIs to satisfy the requirement of reference ZSV [15][18]- [20].Considering the PS_SPWM scheme that the two zero voltage vectors are also utilized in two VSIs, the similar method can also be implemented.Fig. 11 shows the principle and effect of zero voltage vector adjustment for the proposed PS_SPWM scheme.For example, the dwell time of zero voltage vector (111) for VSI1 is adjusted to add ΔT while the dwell time of zero voltage vector (000) is adjusted to subtract ΔT shown in Fig. 11(a), so the three-phase PWM signals change from Ga1, Gb1, Gc1 to Ga1', Gb1', Gc1' which all increase the duty cycles.In this case, the dwell time of active voltage vectors keeps unchanged, while the CMV is changed from Ucm1 to Ucm1' which leads to the voltage-second added.Fig. 11(b) shows the opposite situation for VSI2 which leads to the total voltagesecond reduced.Fig. 11(c In this case, the relationship between the output reference average ZSV and the adjusted dwell time of zero voltage vector can be deduced 0_ 2 6 3 where u0_ref is the output reference average ZSV, ΔT is the adjusted dwell time of zero voltage vector, and TS is the switching cycle of PWM.Based on the above analysis, the detailed modulation algorithm realization process can be drawn and shown in Fig. 12.After adopting the transformation dq/abc, the three phase voltage reference Ua_ref, Ub_ref, Uc_ref can be calculated and divided to the two VSIs, and the conventional symmetric SPWM scheme can be easily implemented to generate the original six modulation signals Ga1, Gb1, Gc1, Ga2, Gb2, Gc2.Thus, the phase-shift operation can be utilized and the symmetric SPWM scheme is upgraded to the asymmetric PS_SPWM scheme which can cancel out the ZSV in ideal condition.In addition, the 0-axis voltage reference U0_ref generated by the ZSC controller is considered to adjust the time of zero voltage vectors with ΔT, then the final six PWM signals which drive dual VSI can be obtained with the updating the switching edges of the PWM signals.

B. OW-PMSM Control Method Based on PS_SPWM Scheme
In order to efficiently suppress the ZSC, the closed-loop controller of ZSC should be added in the motor control system.The reference ZSC i0_ref is set as zero, and the actually feedback ZSC i0 is one third of the sum of sampled three phase currents which mainly contains triple frequency ac component, so the conventional PI controller cannot be efficaciously utilized to eliminate the tracking error.The proportional-resonant (PR) controller which the gain is large enough at selected frequency can track the actual ac trajectory and guarantee the tracking accuracy.Considering the frequency fluctuation even in steady state of motor control process, the quasi PR controller is more suitable to be implemented to guarantee the enough large gain in the near resonant frequency range.The typical transfer function quasi PR controller is shown in ( 26) where kp and kr are the proportional and resonant gains of PR regulator, respectively.ωc is the cut-off frequency, while ω0 is the resonant frequency.In order to suppress the main triple frequency ZSC, ω0 is selected as the third fundamental frequency, and ωc can be selected as 2−5 rad/s [15].With the aforementioned content, the proposed complete control method for the OW-PMSM system can be summed up The final version of record is available at http://dx.doi.org/10.1109/TPEL.2019.2906975 Copyright (c) 2019 IEEE.Personal use is permitted.For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
and shown in Fig. 13.The control diagram consists of one speed-loop and three current-loops, and the control strategy is similar with conventional field oriented control for conventional three-phase motor.The different part are the special designed PS_SPWM scheme and the extra ZSC closed-loop regulator.The actual speed of motor can be deduced with the encoder.The DC-link voltage and threephase currents are sampled in real-time to provide the feedback calculating information.The q-axis reference current iq_ref is given by speed error through the speed PI regulator, while the d-axis and 0-axis reference current id_ref and i0_ref are directly set to be zero in general.The q-axis and d-axis feedback current (iq, id) can be regulated with the corresponding PI regulator, while the 0-axis current i0 should be regulated with the additional PR regulator to suppress the ac harmonic current.

A. System Implementation
In order to verify the effect of the proposed PS_SPWM method and compare with other modulation schemes, experiments have been done in an experimental platform with a prototype 12/16 three-phase OW-PMSM shown in Fig. 14.The parameters of the machine are listed in Table .II of Appendix.The platform consists of a control board with a DSP TMS320F28335 which can generate twelve PWMs to drive dual inverter simultaneously; a power board with two integrated power modules (IPM: 6MBP20RH060, 600 V, 20 A, FUJI) which connect the common DC bus.The DC bus voltage is selected as 75V to meet the back EMF requirements.In addition, the high resolution oscilloscope Rohde & Schwarz RTE1024 with 5GSa/s sampling rate and the high bandwidth current probe RT-ZC20 are utilized to capture the date and make sure the precision of time domain waveform.The multichannel oscilloscope Yokogawa DL850E is used to test the multi-channel signals and record the long time scale waveform.The other related equipment are used to provide the DC power and generate the braking torque.

B. The Current Ripple Related Performance Comparison for Different Modulation Schemes
First, in order to verify the different PWM algorithms, the six PWM signals of upper switching devices for different schemes are tested and recorded by the multi-channel oscilloscope shown in Fig. 15.The 5 kHz switching frequency is selected to obtain the relatively big current ripple in phase current.In this case, the switching period for different schemes are measured to be 200μs which accords with the demand.Fig. 15 Based on the above modulation schemes, the performance of phase current's current ripple is first taken into consideration and make comparison.Since the fundamental current has little influence on the current ripple, the no load test of three-phase currents and ZSC at low and high rotation speeds (i.e. with low and high modulation index) are implemented to make clear comparison for the concerned current ripple.Fig. 16 shows the three-phase currents and ZSC at 150 RPM (round per minute) and without the ZSC closedloop control for the three different schemes.In Fig. 16(a), the conventional SPWM scheme is utilized and obvious high frequency ZSC generates which is caused by the high frequency ZSV pulses.This high frequency ZSC which superimposes in phase current can increase the current ripple of phase current.In addition, though the conventional SPWM scheme does not produce low frequency ZSV theoretically, the low frequency ZSC (mainly the triple harmonic current) still exists in phase current which is caused by other ZSV  To further investigate the current ripple of different schemes, the frequency domain analysis of phase current is also implemented and shown in Fig. 16, respectively.Comparing to the conventional SVPWM scheme which both the odd and even switching harmonics exist, it can be seen that the phase current of SPWM scheme and proposed PS_SPWM scheme have the double frequency effect.Nevertheless, the high frequency ZSC superposed in phase current palpably increases the THD value for the SPWM scheme.The RMS (root mean square) value of the switching frequency current for the SPWM scheme is 0.105A, while the value is reduced to 0.075A for conventional SVPWM scheme, and the proposed PS_SPWM scheme has the minimum value of 0.073A.Since the conventional SVPWM scheme have little odd switching harmonics comparing to the even switching harmonics in low modulation index condition, the double frequency effect of the proposed PS_SPWM scheme can only reduce little RMS value which coincides with the theoretical analysis shown in Fig. 10.
Fig. 17 shows the three-phase currents and ZSC at 900 RPM for the three different schemes.In Fig. 17(a), the high frequency ZSC is further increased for the conventional SPWM scheme which lead to the fundamental current submerging by the current ripple, and the RMS value of the switching harmonics is also significantly increased to 0.838A.Fig. 17(b) and (c) show the phase current performance for the SVPWM and PS_SPWM schemes.It can be seen that the current ripple of SVPWM scheme is obviously larger than the proposed PS_SPWM scheme in time domain.The current ripple RMS value of the two modulation schemes are 0.154A and 0.107A correspondingly.This effect can be explained with the FFT analysis in frequency domain.For the SVPWM scheme, the 1 st switching frequency harmonics are Copyright (c) 2019 IEEE.Personal use is permitted.For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
IEEE POWER ELECTRONICS REGULAR PAPER/LETTER/CORRESPONDENCE dramatically increased and become the dominant part of current ripple in high modulation index.As for the proposed PS_SPWM scheme, even the 2 nd switching frequency harmonics slightly increased, the amplitude is smaller than the 1 st switching frequency harmonics of SVPWM scheme, and it can obviously suppress the 1 st switching frequency current which finally reduce the RMS value comparing to the SVPWM scheme.The above result is also coincided with the theoretical analysis shown in Fig. 10.
To investigate the variation tendency of the high frequency current ripple RMS value for the three different schemes, the speed scan is implemented and the result is illustrated in Fig. 18.It can be seen that the conventional SPWM scheme induces the severest high frequency switching current in the whole speed range.This phenomenon is caused by the duration increase of ZSV pulses with the modulation index raise.So the conventional SPWM scheme is not suitable for the occasion of OW motor drive which does not discuss in the following content.The proposed PS_SPWM scheme can overcome the ZSV pulse induced high frequency ZSC problem, and the performance is better than the conventional SVPWM scheme in all working conditions shown in the enlarge view, especially in high speed range.For example, when the motor speed is at 900RPM, the proposed PS_SPWM scheme can decrease 30.53% of the current ripple RMS value comparing to the conventional SVPWM scheme without adding extra switching actions which show the superiority of current ripple reduction effect for the proposed PS_SPWM scheme.What's more, the tendency of curves is coincided with the theoretical calculation result shown in Fig. 10.So the proposed PS_SPWM scheme has the potential to reduce the THD of phase current when the high frequency current ripple is not negligible.
Moreover, the high frequency motor vibration and acoustic noise which are important indicators in actual motor drive application are directly related to the current ripple and should be concerned.To further verify the performance of the two different schemes, the motor vibration and acoustic noise have been tested.The vibration acceleration signals are measured by the accelerometer (PCB TLD352C03) and acquired by a data acquisition module (LMS SCADAS Mobile Front-End SCM202).The frequency domain vibration result at 900 RPM is illustrated in Fig. 19.It is obvious that the vibration is mainly induced by the 1 st switching frequency harmonic currents for the conventional SVPWM scheme and the maximum vibration acceleration is 0.895m/s 2 , while the dominant vibration is caused by the 2 nd switching frequency harmonic currents for proposed PS_SPWM scheme and the maximum vibration acceleration is reduced to 0.47m/s 2 .This two vibration acceleration spectrums are both coincided with the phase current spectrum shown in Fig. 17(b) and (c) in this case.What's more, the total vibration acceleration are measured as 1.072 m/s 2 and 0.592 m/s 2 for the two different schemes.So the motor vibration can be reduced with the utilization of the proposed scheme.
In addition, the motor acoustic noise test is also implemented.The acoustic noise is measured by the noise sensor (Bruel & Kjaer Microphone Unit Type 4189-A-021), and the frequency domain performance at 900 RPM is illustrated in Fig. 20.It can be seen that the two acoustic noise spectrums are almost coincided with phase current spectrum in logarithmic coordinates and the obvious noise peak reduction can be realized for the proposed PS_SPWM scheme.Moreover, the weighted acoustic noise are calculated as 72.52 dB(A) and 66.1 dB(A) for the two methods which means the proposed PS_SPWM scheme can reduce the weighted acoustic noise to 22.81% of the conventional SVPWM scheme.So obvious acoustic noise performance improvement can be realized which is advantageous in actual application occasions.
From the above experimental comparison, it can be seen that the PS_SPWM scheme has better performance comparing to the conventional SVPWM scheme, including the current ripple reduction, the motor vibration and the acoustic noise suppression.So the PS_SPWM scheme can relieve the current ripple related adverse effect and improve the corresponding performance of motor drive.

C. Current Control Performance Comparison for Different Modulation Schemes
In this part, the switching frequency is increased to 10 kHz to obtain the fast and accurate control performance.In order to verify the low frequency ZSC suppression effect for the proposed PS_SPWM scheme, Fig. 21 shows the dynamic Copyright (c) 2019 IEEE.Personal use is permitted.For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org.
process from the condition of without ZSC control to with ZSC control at 0.375 rated speed and 0.2 load.From Fig. 21(a), it can be seen that though the proposed PS_SPWM scheme can eliminate the modulated ZSV disturbance source, the phase current still takes a rich content of triple harmonics without the ZSC control.This phenomenon is owing to that others ZSV disturbance sources induce the ZSC current.Without ZSC control, the peak value of phase current reaches 2.3A, and the ZSC's peak value is 0.4A.After adding the ZSC closed-loop control, the peak value of phase current is reduced to 1.9A, and the ZSC's peak value is less than 0.1A.So the proposed ZSC closed-loop control can effectively suppress the ZSC and reduce the peak value of phase current.With the FFT analysis for the phase current shown in Fig. 21(b), the THD of phase current is 24.1% without the ZSC control, while it can be reduced to 6.09% with the ZSC control.As for other triple harmonics, like the 9th and 15th harmonics, the amplitude are small enough to be neglected.Moreover, to further verify the dynamic response for the proposed PS_SPWM scheme and compare with the conventional SVPWM scheme, the speed step experiments have been done, and the experimental results are shown in Fig. 22(a) and (b).It can be seen that the proposed PS_SPWM scheme has nearly identical performance comparing to the conventional SVPWM scheme under the same control condition.The ZSC can be well suppressed in different rotation speed and the phase current can keep sinusoidal in this case.
Finally, the torque variation experiments have been done to verify the current dynamic response for the two schemes.The experimental results of torque variation process are shown in Fig. 23(a) and (b) for the two schemes.It can be seen that the proposed PS_SPWM scheme has similar current regulation performance comparing to the conventional SVPWM scheme with the same control parameter.The phase current can also keep sinusoidal and the ZSC can be well suppressed with different output torque whether in steady state or dynamic process.
Considering the experimental results of Fig. 22 and Fig. 23, it can be seen that the proposed PS_SPWM scheme has no performance degradation comparing to the conventional SVPWM scheme which is owing to that the proposed scheme only optimize the current ripple and has no influence on the fundamental output current.21 The current waveform for the proposed PS_SPWM method: (a) the dynamic process from without ZSC control to with ZSC control, (b) the frequency domain analysis location of voltage pulses in two inverters.Only by conventional SPWM scheme associated with suitable phaseshift, the dominated ZSV disturbance source of inverter can be eliminated in ideal condition.The following conclusions can be derived: 1.The zero sequence impedance of the OW-PMSM is often with small value because of the weaken effect by mutual inductance.Without control of ZSV, obvious ZSC can be found in the motor and brings corresponding problems.The proposed PS_SPWM method can help to cancel the modulated ZSV disturbance source.2. The proposed PS_SPWM scheme has the same DC bus utilization with conventional SVPWM scheme regardless the principle difference.3. The proposed PS_SPWM scheme can fully utilize the freedom of dual inverter and maintain the double frequency effect which can almost eliminate the odd switching frequency harmonics in phase current and reduce the high frequency current ripple.Meanwhile, the motor vibration and acoustic noise can be suppressed.4.After adding the ZSC regulator in the control system for the proposed PS_SPWM scheme, the ZSC can be obviously suppressed whether in steady state and dynamic process which has similar performance comparing to conventional SVPWM scheme.
The experimental results show that the proposed method is effective to be utilized in the dual inverter fed OW-PMSM with common DC bus and has better performance comparing to the conventional SVPWM scheme.

( 3 )
the flux linkage in the dq0 frame can be represented as
. The principle is based on the PWM signals rotation which ensures VSI1 and VSI2 taking the same three PWM signals and generates the identical CMVs.Without losing generality, assuming the three-phase duty cycle in VSI1 satisfies the relationship that da1>db1>dc1.By exchanging the sequence of PWM signals for VSI1, the corresponding PWM signals for VSI2 can be generated shown in Fig. 5, where Ga1, Gb1, Gc1 and Ga2, Gb2, Gc2 are the three-phase PWM signals for VSI1 and VSI2, respectively.TS is the switching cycle.In this case, the CMVs of different VSIs can keep identical, and the combined voltage vectors in one switching cycle are V00'-V13'-V24'-V77'-V24'-V13'-V00' which naturally satisfies the requirement of utilizing zero ZSV voltage vectors, so the ZSV

Fig. 4
Fig. 4 The zero ZSV voltage vectors for dual-inverter the resultant voltage vector ref V lags behind the synthetic voltage vector 1 ref V with 30° while the amplitude is 3 times of synthetic voltage vector for single VSI.
Thus, the three-phase duty cycles for VSI2 also satisfies the identical Under above conditions, without losing generality, assuming da1 is maximal in six phase-legs which can deduce da2 is minimal, and db1>dc1, db2<dc2, so the six PWM signals, CMVs and ZSV for conventional symmetrical SPWM scheme can be drawn and shown in Fig.6(a).It can be found that the rising and falling edges of PWM signals are in different positions which generate different instantaneous CMVs for the two VSIs.Moreover, though the summation of three-phase duty cycles for the two VSIs always keep identical which can eliminate the average ZSV, the instantaneous CMVs difference generate the high frequency ZSV pulses which lose the function of eliminating ZSV and induce the high frequency ZSC.This phenomenon is owing to the symmetric manner for conventional SPWM scheme.If appropriate phase-shift used, the rising and falling edges have the ability to be aligned correspondingly.(a) (b)In fact, setting the maximum and minimum duty cycle in symmetric PWM scheme can prescribe limits to the range of rising and falling edges.With this specified edge ranges, the phase-shift can be implemented in this edge ranges and avoid the spillover problem which can promise to add no extra switching actions in one switching cycle.Fig.6(b)show the principle of the proposed phase-shift scheme to eliminate the instantaneous ZSV in one switching period.In this scheme, the PWM signals of phase A which has the maximum or minimum duty cycle keeping symmetric while the PWM

Fig. 6
Fig. 6 The PWM signals, CMVs and ZSV for conventional symmetric SPWM scheme and novel phase-shift SPWM scheme in one switching period: (a) the conventional symmetric SPWM scheme, (b) the novel phase-shift SPWM scheme this case, all of the rising edges and falling edges can keep aligned for the conventional SPWM scheme with the combination of proper phase-shift, so the CMVs of two VSIs can keep identical and eliminate the ZSV shown in Fig. 6(b).
)The relationship of synthetic voltage vectors for each VSI can be ), and relative position for the synthetic voltage vectors are shown in Fig.7(b).It can be clearly seen that the principle of voltage vector synthesis for this two methods have distinct difference.

Fig. 7
Fig. 7 The reference voltage combination for two ZSV elimination schemes: (a) the conventional SVPWM with signal rotation scheme, (b) the novel PS_SPWM scheme

Fig. 10
Fig. 10 The equivalent current THD and the equivalent dominant switching harmonic currents comparison ) shows the effect of zero voltage vectors adjustment for the output ZSV.With the switching edges adjustment for different phase-legs, the six narrow ZSV pulses can be generated with the same dwell time of ΔT.

Fig. 12
Fig.12The detailed modulation algorithm realization process (a) shows the symmetrical SPWM scheme.The PWM signals deduced two CMVs are different which can produce the high-frequency ZSV pulses.Fig. 15(b) shows the scheme of conventional SVPWM with signal rotation.In this case, the two CMVs generated by the dual inverter can be identical and keep symmetrical in one switching cycle.Fig. 15(c) gives the result of the proposed PS_SPWM scheme.It can be found that the two asymmetrical CMVs generated by the dual inverter keep identical with proper phase-shift which can cancel out the modulated ZSV disturbance source theoretically.

Fig. 14
Fig. 14 Experimental platform sources.Fig.16(b) and (c) shows the performance of SVPWM and PS_SPWM schemes, respectively.It can be found that the high frequency ZSC is eliminated, and only low frequency triple harmonic ZSC exist in this case.

Fig. 17
Fig.17The phase current and ZSC comparison for the three different schemes at 900RPM: (a) the conventional SPWM scheme, (b) the conventional SVPWM scheme, (c) the proposed PS_SPWM scheme

Fig. 20
Fig. 20 The motor acoustic noise comparison for the two different schemes at 900 RPM This paper introduces a novel PS_SPWM scheme for OW-PMSM fed by two VSIs with the common DC bus.The proposed PS-SPWM method is based on the adjustment of

Fig. 23
Fig. 23 The torque variation experiments for the conventional SVPWM and the proposed PS_SPWM methods: (a) the conventional SVPWM method, (b) the proposed PS_SPWM method 