Circulating Current Control for the Modular Multilevel Matrix Converter Based on Model Predictive Control

—In this work, a Continuous-Control-Set Model Predictive Control (CCS-MPC) strategy, with a saturation scheme for protection, is presented for regulating the circulating currents of a Modular Multilevel Matrix Converter (M3C). The proposed scheme is based on a state space model of the M3C and allows protection and better utilisation of the devices through a saturation scheme, which directly limits the arm currents and cluster output voltages by integrating the corresponding bounds as constraints of the CCS-MPC scheme. In order to solve the inherent optimisation problem associated to the CCS-MPC, an active-set algorithm is implemented. Experimental and simulation results from a 27-cell M3C prototype validate the proposed strategy and illustrate the good performance achieved with the methodology presented in this work.


I. INTRODUCTION
The Modular Multilevel Matrix Converter (M3C) is an important power electronic topology that belongs to the Modular Multilevel Converter (MMCs) family [1], [2], [3], [4], [5].The M3C topology is composed of several full-bridge power cells (shown at the right-side of Fig. 1), which are grouped into nine power clusters.The serial connection of a cluster with an inductance, is referred to as an arm (shown at the left-side of Fig. 1).The M3C has been proposed as a prominent topology for low-speed high-torque drives since lower amplitude circulating currents are required compared to those utilised by other MMCs, particularly when the electrical machine is operating at low speed [6], [7], [8].It has also been proposed for Wind Energy Conversion Systems (WECS) based on Permanent Magnet Synchronous Machines [9], for improved fault ride-through control of doubly-fed induction generators [10], for low frequency transmission systems [11] and , as discussed in [12], in the future it is highly possible This manuscript was submitted on the 5th of September 2020 and accepted on the 29th of March 2021.The work of Matías Urrutia was supported by CONICYT-PCHA/Doctorado Nacional/2018-21181386, and the work of Roberto Cárdenas was supported by Fondect Nr. 1180879 and Basal Project FB0008.
Matía Urrutia is with the Department of Electrical Engineering, Universidad de Chile, Santiago 8370451, Chile and the PEMC Research Group, Faculty of Engineering, University of Nottingham, Nottingham NG7 2RD, UK.(e-mail: matias.urrutiaortiz@nottingham.ac.uk).
Roberto Cárdenas is with the Department of Electrical Engineering, Universidad de Chile, Santiago 8370451, Chile (e-mail: rcd@ieee.org).
Jon Clare and Alan Watson are with the PEMC Research Group, Faculty of Engineering, University of Nottingham, Nottingham NG7 2RD, UK (jon.clare@nottingham.ac.uk and alan.watson@nottingham.ac.uk).that the M3C will replace the thyristor-based cyclo-converters.An overview of M3C applications is presented in [13].
The control of the M3C is a challenging task due to the large number of floating capacitors and the complex arm interconnections [4].The control schemes reported are typically implemented using three cascaded loops [9], [3], [2], [14] employing different control bandwidths.The three loops are respectively designed to regulate the Cluster Capacitor Voltages (CCVs), to control the arm-currents, and to locally balance the capacitor voltages in each cluster.
To achieve energy balance in the M3C, i.e. to regulate the floating capacitor voltages of the nine clusters, four circulating currents are utilised as degrees of freedom [3], [4], [15].Usually these currents have two or more frequency components [15], [2], [16], and typically Proportional (P) controllers have been proposed for regulating them [4], [7], [17], [15].Although P-controllers have shown adequate performance in some applications, they cannot provide good tracking for sinusoidal references unless the gain is increased, which introduces a trade-off between improvement in tracking error and an undesirable amplification of the electrical noise in the measurements.Moreover, as typically happens in most of the practical control systems, a large increase in the control gain may move the closed loop poles to poorly damped positions which certainly affect the dynamic response of the system.To avoid the inherent tracking problem of P-and PI-controllers in the presence of sinusoidal references, in [18] it is proposed the utilisation of multi-resonant controllers.However, multiresonant controllers have to be tuned online when the input and/or output frequencies are varying, which implies that some sort of self-tuning algorithm is required (see [18], [19]).
In addition to the requirement for satisfactory referencetracking with high-bandwidth for the circulating current control, a saturation scheme should be included to ensure effective protection of the converter.The total current in each arm of the M3C has several components, i.e a contribution from the input and output currents, and a contribution from each of the four circulating currents.Additionally, the circulating currents usually have (at least) two frequency components and they could have both positive and negative sequences.Therefore, as demonstrated in Section V.A.3, it is very challenging to implement protection algorithms for the total arm currents and cluster voltages, which are required, for instance, to ensure that the thermal limit of the devices in each arm is not exceeded.The arm current control schemes reported in the literature saturate each voltage and current component separately, e.g.saturating the input current vector, output current vector, positive and negative sequence components of the circulating currents etc. using heuristic criterion [15], [2], [16].This is certainly a sub-optimal solution because limiting each component independently does not ensure that the arm current or voltage is adequately limited or, conversely, fully exploited.
Recently, the application of Model Predictive Control (MPC) schemes for the control of power electronic converters and drives has been reported in the literature.Most of the proposed algorithms are based on Finite-control set MPC (FCS-MPC) and, more recently, Continuous-Control Set MPC (CCS-MPC) methodologies have been reported [20], [21], [22], [23], [24].A well-known advantage of MPC algorithms is the straightforward integration of system non-linearities and strong constraints into the scheme [4], [25].However, when applied to MMCs, FCS-MPC strategies have an unfeasible computational burden, due to the very large number of switching states [20] available in a typical M3C.For this reason, modified FCS-MPC algorithms for MMC applications have been proposed, with a restricted number of switching states at each sampling time to limit the searching space and to reduce the computational burden.This approach complicates the analysis and implementation of the algorithm and does not ensure an optimal solution.Moreover, another drawback of FCS-MPC is the variable switching frequency.Considering these disadvantages, there has been little discussion of the applications of FCS-MPC to M3C in the literature (see [26]) and no experimental results have been reported for this methodology.
Regarding CCS-MPC strategies, in [27] it is reported an optimising approach for regulating the capacitor voltage oscillations of the M3C.This strategy is based on a cascaded (two step) optimisation methodology, where the manipulated variables are the common-mode voltage and the circulating current references.The performance of the proposed scheme is good and it gives an adequate dynamic performance.However, the two-step optimisation methodology does not necessarily produce a globally optimal operating point.Therefore it has the disadvantage of reaching sub-optimal solutions.Another reported implementation of CCS-MPC for M3C applications is discussed in [16].In this publication a saturation scheme is successfully integrated into the control system.However, the implementation of the saturation scheme was not comprehensively analysed , and validation of the proposed methodology was realised only by simulation.
As reported in previous publications, the control of modular multilevel converters for drive applications is typically realised utilising different control algorithms for different operating points of the electrical machine.For instance, in [28], the control of the Modular Multilevel Converter (M2C) is divided into the Low-Frequency Mode (LFM) and the High-Frequency Mode (HFM) [28].In the LFM, the addition of common mode voltage is usually required as well as the utilisation of mitigation currents.A similar separation of control algorithms is utilised for the M3C, where the control system is usually divided into the Different Frequency Mode (DFM) and Equal Frequency Mode (EFM) (see [5], [15], [17]).Again in the EFM, common mode voltages and mitigation currents are required.Nevertheless, is should emphasised that in a drive applications, e.g. when the M3C drives a high power induction machine, the DFM represents most of the machine operating range (see [5], [15], [13]).
In this paper a new CCS-MPC algorithm is presented, where the scheme is designed to regulate the circulating current in the M3C during DFM Operation [15], using a State Space Model (SSM) approach [16], [29].This approach allows a linear representation of the M3C using state variables, simplifying the incorporation of the constraints (for instance the current limits) into the CCS-MPC strategy.To solve the CCS-MPC problem, an active-set algorithm [30], [31] is integrated into the proposed scheme.The benefits of the proposed MPC are its straightforward implementation, due to the simple and linear nature of the circulating current dynamic relationships, and its low computational complexity.Furthermore, although input/output port current regulation is not included in the proposed MPC scheme, saturation limiting of the arm currents by adjusting the circulating currents alone is successfully addressed and it affects neither the input nor output port currents.To the best of the authors' knowledge, this control strategy approach has not been previously reported in the literature.
Summarising, the main contributions of this work are: • A new CCS-MPC implementation for regulating the circulating currents of the M3C including constraints is presented, fully analysed and experimentally validated.• A saturation (protection) scheme is integrated with the proposed CCS-MPC algorithm to avoid operating with currents and voltages outside the predefined limits.A suitable Active Set Algorithm is programmed to achieve these goals.Experimental validation is provided.• The protection scheme, which solely adjusts the circulating currents, is hidden from the input and output port voltages and currents.Therefore, the port control performance is unaffected on both sides.Other applications are also feasible considering that regulation of the arm currents and circulating currents are also required in other converter topologies such as, for instance, the M2C (see [13], [29]).Therefore the MPC strategy proposed in this work could be modified to address other challenges.
The rest of this work is organised as follows: modelling of the M3C, including an overall discussion of the proposed control system is presented in Sections II and III.In Section IV the proposed control strategy for regulating the circulating currents of the M3C is analysed.Simulation and experimental results are discussed in Section V. Finally an appraisal of the proposed methodology is presented in Section VI.

II. MODELLING OF THE M3C
The M3C modelling approach presented in this section is based on a state space representation of the converter that is derived from [16], [29].The resulting linear model allows a simple representation of the dynamics of the input/output port and circulating currents of the M3C.Additionally, the state space model enables implementation of MIMO-based control techniques, for instance, Model Predictive Control, Kalman filters and sensor-less approaches.
Modelling of the M3C is based on two decoupled dynamic sub-models: The Current-Voltage Dynamic Model and The Output-Power/Capacitor-Voltage Model.These are discussed below.

A. Current-Voltage Dynamic Model
Using the references shown in Fig. 1, the dynamics of the arm currents are defined by: where the input and output ports are defined by "rst" and "uvw" respectively, L b is the arm inductance, and v com is the voltage between the input and output port neutral points.
B. Output-Power/Capacitor-Voltage Model of the M3C The energy of the j-th cluster of the M3C is defined as: where it is assumed that the cluster composed of n cells having the same capacitance.Conveniently, the cluster stored energy can be rewritten as: with ψ Cbj = n r=1 (v j Cr ) 2 as the sum of the square of the capacitor voltages from the j-th cluster.With this definition, the following relation is stated for the nine clusters: where a SSM in a vector form is utilised, and p bj = v bj i bj is the instantaneous output power of the j-th cluster.Moreover, as depicted in (6), the dynamic relationship between each ψ C and its respective output-power is linear, and the small-signal models proposed in [2], [9], [15] are avoided if the controlled variable is ψ C instead of the sum of the capacitor voltages.
If the expression ( 6) is pre multiplied by T αβ0ε , the following relation is obtained: Regulation of the transformed variable ψ C is convenient in terms of control purposes, which establishes the same interpretation shown in [9], [1].The component ψ C0 is related to the overall energy stored in the M3C, and the remaining eight transformed terms represent the energy imbalance in the nine clusters.If the eight variables related to the balancing are equal to zero, it means that the stored energy of the M3C is evenly distributed among the clusters.Regarding the regulation of the stored energy of the M3C, the ideal condition is that all the capacitor voltages have the same value v ref C .Therefore, the set-point values to regulate the ψ c values are defined as: where N t is the total number of modules, and 0 8x1 is a 8x1 zero vector.

III. PROPOSED CONTROL SCHEME FOR THE M3C
As explained in the introduction, in this work the control system design is focused only on DFM operation [15], where mitigation of very large low-frequency oscillations of the capacitor voltages is not required (see [5]). Discussion of the control system design and implementation is divided into three stages: control of the stored energy, control of the arm currents and modulation integrated with capacitor balancing control.Fig. 2 shows the proposed control scheme.

A. Stored Energy Control of the M3C
Regulation of the stored energy in the M3C has two goals: (a) to control the total stored energy and (b) to balance the stored energy evenly amongst the nine clusters.Fig. 3 illustrates the implemented control schemes.
1) Total Energy Control: The aim of the Total Energy Control system is to regulate the variable ψ C0 to the value depicted in (8).In terms of the transformed input/output currents and voltages, the dynamic of ψ C0 is given by: where p 1 and p 2 are the output and input port instantaneous power, respectively, and a complex notation is adopted with v1 = v α1 + jv β1 , v2 = v α2 + jv β2 , ˙i1 = i α1 + ji β1 and ˙i2 = i α2 + ji β2 as the transformed output voltages and currents of the M3C.Notice that the superscript c is used to indicate the application of the complex conjugate operator.
Thus, for controlling ψ C0 , the grid-side power can be used.In this regard, a simple PI controller implemented with an antiwindup saturation scheme with maximum value I sat d is used to 2) Balancing Energy Control: The goal for clusterbalancing control is to balance the DC components of the cluster stored energies, which is required during DFM Operation [15].
To define the balancing scheme, the dynamic equations of the transformed variables are established as: where ψCε34 =ψ Cε3 +jψ Cε4 are the complex form of the controlled variables.Additionally, v 0 =0 is assumed, and ˙iε12 =i ε1 +ji ε2 with ˙iε34 =i ε3 +ji ε4 are the two circulating current pairs in their complex form.Furthermore, the following complex power terms are defined: , which depend on the input/output port variables and, therefore, they could be considered as disturbances from a control perspective.Hence, the manipulated variables for regulating the complex energy vectors are the circulating currents ˙iε12 and ˙iε34 .In this work, vector control systems orientated with rotating reference frames are utilised for the regulation of the variables [ ψC αβ1 , ψC αβ2 , ψC αβ2 , ψCε12 , ψCε34 ] and this can be achieved with relatively low bandwidth PI controllers, implemented with anti-windup schemes and saturation values of ±I sat ε (see [9]).The reference frames for balancing ψC αβ1 , ψC αβ2 , ψCε12 and ψCε34 , are orientated along vc 2 , v1 , vc 1 and v2 , respectively; additionally, for balanced operation, the set-point values of all complex energy terms have to be set to zero.Fig. 3(b) illustrates the Balancing Control Scheme, where i ε =[i ε1 i ε2 i ε3 i ε4 ] is the vector form of the four circulating currents, and θ 1 with θ 2 are the angles of the output voltage rotating vectors v1 and v2 respectively.

B. Arm Current Control
Arm current control has also two goals: to regulate the input/output port currents and to regulate the circulating currents.The dynamics of the input/output current control loops are dependent on the external systems connected to the converter, whereas the circulating current controllers are decoupled and are independent of whatever is connected to the input/output ports.
1) Input/Output Port Current Control: In this work, two balanced grids are connected to the uvw and rst input/output ports respectively.Without loosing generality, the output uvw port can be considered as equivalent to an electrical machine, where its back emf is the balanced grid.Therefore, the vector v uvw rst (see Fig. 1) can be decomposed as follows: where L uvw and L rst are the Thevenin equivalent inductances of the input/output ports, and T are the grid voltages of these ports.
For the implementation presented, regulation of the currents is achieved using a vector control strategy with an anti-windup saturation scheme implemented along a synchronous reference frame orientated along the corresponding grid voltage vector [33], [9].
2) Circulating Current Control: Regulation of the circulating currents requires knowledge of the output voltages defined by the input/output port current controllers.The details of the implemented MPC strategy is fully discussed in Section IV.

C. Modulation and Local Balancing Control
The modulation scheme is based on a Phase Disposition PWM with a sawtooth carrier waveform (single-edge PWM) [34], [35], where the Capacitor Voltage Balancing (CVB) of the cells in a given cluster is accomplished by using a sorting scheme based on a priority list which defines the modules to be utilised.This scheme is extensively discussed in [14].
IV. CIRCULATING CURRENT CONTROL SCHEME For regulating the circulating currents, an MPC strategy is utilised, where arm currents and cluster output voltages bounds are incorporated.The resulting optimisation problem is solved using an active-set algorithm [30], [31], which is suitable for implementation in a low cost DSP platform as the TMS320C6713 control board utilised to obtain the experimental results discussed in this work.The integration of the bounds as inequality constraints in the MPC scheme enables a saturation (protection) scheme for the power converter, where the circulating currents are modified when a limit is reached.The target of the saturation scheme is to maintain the arm currents and cluster output voltages within predefined limits even when the converter is operating under rapid transient conditions.
In the approach presented here, the MPC scheme only considers the circulating currents.Whilst it may be possible to include input/output port current regulation as well, a scheme using only the circulating currents has a number of attractive features which make it equally worthwhile to consider.These include the natural high bandwidth response, successful arm current saturation (with a straightforward implementation) during transients, and a reduced computational burden in comparison to an MPC scheme using the nine arm currents.Additionally, arm current/voltage saturation is optimally achieved without affecting the input/output port currents, which can be adequately controlled using conventional approaches.Conversely, as discussed in the Introduction, and demonstrated in Section V.A.3, saturation of the arm currents using conventional linear controllers may produce sub-optimal performance.

A. Modelling and MPC Definition
As depicted in (3), the circulating current dynamic relations are not dependent on the input/output port voltages v o αβ12 .By using a ZOH discretisation method with sampling time T s in the last four rows of (3), the following discrete-time model for the circulating currents is obtained: where A ε =I 4 , B ε =-Ts Lb I 4 and I 4 is an 4x4 identity matrix.Notice that the dynamics of each circulating current are dependent on its corresponding circulating voltage v ε,k , and there are neither external disturbances nor coupled interactions with other circulating currents or voltages.
To regulate the circulating currents, a MPC strategy with finite horizon of order 1 is proposed [36], [37], [21], [38]: as the circulating current error vector, with reference i ref ε defined by the stored energy control (see the outer control loop in Fig. 3(b)), and as the circulating voltage error, with v ref ε is defined by a deadbeat control law [21], [38]: Matrices R = r ε I 4 and Q = q ε I 4 are, respectively, the costs of ûk and xk , with q ε ≥0 and r ε >0 [37].For regulation purposes, the regulation of all current errors are considered equally important.
Furthermore, the inequality constraints are specified by the current limits and Cluster Capacitor Voltages (CCVs) of the nine clusters, where it is important to highlight that the measured CCVs are considered as constant values during the sampling period.
By replacing the equality constraint of ( 14) in the cost function, the following optimisation problem is obtained [21], [38]: 2r ε as the resulting cost of the new optimisation problem, and ûunc,k =-2(h -1 ε q ε r ε )x k as the optimal solution of ( 18) without considering the inequality constraints.As described in (18), the inequality constraints sums a total of 36 bound limits.

B. Constraints of the MPC problem
In this section, the procedure of redefine the constraints in terms of ûk , defined in (16), is detailed.To accomplish this goal, the dynamic relation (13), the input/output port voltages defined by the output current controllers, and the linear transform defined in (2) are considered.
1) CCVs constraints: The inequality constraints related to the available CCVs can be rewritten in terms of the transformed voltages by using (2): where the vector v αβ0ε,k can be decomposed into Taking into consideration the definition shown in ( 16), hereinafter the following decomposition is used for the transformed voltage vector: where the first term of the right hand of the relation is already known from the input/output port current control scheme and the circulating current control law used in the MPC scheme, and 0 5x4 is a 5x4 matrix composed of zeros.Replacing this decomposition into (19), yields: Uv dc (22) with L vdc =−v dc,k +v ref b,k and U vdc =v dc,k +v ref b,k as inferior and upper limits in vector form, and as the output voltage reference considering (17).
The resultant inequality constraint depends on the value of the measured currents and, therefore, it changes at every sampling period.
2) Current limit constraints: On the other hand, the arm current limits can be stated by the transformed current terms: where i αβ0ε,k+1 = i αβ0,k+1 i ε,k+1 . Moreover, taking into account ( 13) and ( 16) yields: If the models of input/output ports are not clearly defined it could be stated that i αβ0,k+1 ≈i αβ0,k , which can be a good approximation when the sampling frequency is reasonably high, and the sampling time is relatively small when compared to the time constants associated with the load dynamics.We refer to this as the "MPC Strategy with Saturation Scheme A".If the models of input/output ports are known, the computation of an estimation for i αβ0,k+1 can be calculated online [for instance using a discretised version of the input/output plant models described in Section III-B1] and it helps to obtain a better definition of the bounds for each sampling period.We refer to this as the "MPC Strategy with Saturation Scheme B".
Regardless of which saturation scheme is used, if an estimation of the output currents is known at instant "k+1", it can be used in (23) to define the following bounds: where L Imax =-Lb Ts (I max +i b,k )+∆v bε is the lower bound, and U Imax = Lb Ts (I max −i b,k )+∆v bε is the upper bound in vector form, with ∆v bε =T -1 αβ0ε

3) Incorporation of the Constraints into the Cost Function:
The constraints defined in (22) and (25), expressed in terms of the argument ûk , are computed at every sampling period.In the following, it is shown that the original 36 bounds can be reduced to 18 to significantly reduce the complexity of the problem to solve.
For the j-th cluster, the following bounds are defined, where L Imax,j and L vdc,j are the j-th element of vectors L Imax and L vdc , respectively.Additionally, C u,j is the j-th row of matrix C u .
As depicted in (26), if the constraint related to the maximum between L Imax,j and L vdc,j value is met, the other constraint is automatically met too.Therefore, ( 26) can be replaced by just one constraint as, With a similar procedure, the upper bounds for the same j-th cluster can be stated as, where U Imax,j and U vdc,j are the j-th element of vectors U Imax and U vdc , respectively.With the same analysis done for the lower bounds, the two upper bounds can be replaced by the following constraint: With the aforementioned considerations, the inequality constraints of (18) rewritten in terms of ûk are incorporated as follows: where are the constraints utilised for the proposed MPC strategy.The operators "Max{}" and "Min{}" compute the maximum and minimum values for each element of the respective input vectors.The outputs of these operators have the same size as the inputs.Therefore, the 36 constraints of the space defined from ( 22) and ( 25), are significantly reduced to 18 as shown in (31).These 18 constraints define the size of the matrices M u and K u as 18x1 and 18x4, respectively.

C. Implementation of the Strategy
To solve the optimisation problem stated in ( 18), an Activeset algorithm is used with the methodology discussed in [31].
The Active-set method states that the solution of the main Quadratic Programming (QP) problem of ( 18) is equivalent to the solution of the following Equality Constrained QP (EC-QP), where W * is the set of active constraints defined from (30), with K * u and M * u as the matrices composed of the active rowvectors and elements from K u and M u , respectively.Because the set W * is not known initially, an iterative procedure for finding W * and solving (32) is implemented.For every iteration, a rearranged EC-QP obtained from ( 32) is solved, which has the following structure for the j-th step, Minimize where p k,j is the argument, g k,j =-h ε (û k,j-in +û unc,k ) is a vector defined at every iteration according to the input ûk,j-in , and K u,j is assembled from the selected row-vectors defined in W j according to the active constraints in the j-th iteration.The solution of ( 33) is obtained using: where p * k,j is the optimal solution, and λ * k,j is the vector of Lagrange multipliers that has a length equal to the number of active constraints [31].
If p * k,j = 0, it means that ûk,j-in is the optimal value that minimizes (33).Moreover, if all the elements of λ * k,j are zero or positive, it implies that ûk,j-in is the global optimal solution that satisfies (18) , and W j =W * .
If p * k,j = 0 and at least one element of λ * k,j is negative, it implies that the computed solution does not satisfy all the required conditions for (18) [31]; therefore, according to the active-set methodology, the constraint η j ∈ W j related to the most negative element of λ * k,j is removed, and a new iteration starts with a reduced set of active constraints (i.e, W j+1 =W j −η j and ûk,j = ûk,j-in ).
On the other hand, if p * k,j = 0 it implies that ûk,j-in is not the optimal solution of (33) and it has to be updated according to ûk,j = ûk,j-in + α k,j pk,j , where is the "step-length" parameter, k γ is the γ-th row-vector of K u , m γ is the γ-th element of M u , and V j is defined as the set of all non-active constraints that, for every γ-th element, satisfies k T γ p k,j < 0. If α k,j <1 due to some constraint ρ j ∈ V j , this element ρ j is added to the active-set W j for the next iteration (W j+1 =W j + ρ j ).
A flowchart of the Active-set algorithm is illustrated in Fig. 4. To avoid the potential problem of the algorithm failing Fig. 4. Flowchart of the implemented Active-set algorithm described in Section IV-C.The algorithm is performed at every sampling period.to converge, an iteration limit value j max is set.If this value is reached, the iteration is stopped and the unconstrained solution is used.
In this work a value of j max =9 has been used because, after extensive simulation and experimental work, the algorithm never required more than 9 iterations to obtain the solution.
Therefore, in accordance with ( 16), the applied circulating voltage is determined by From this formulation, it is worth to mention that if null constraints are active, then with k p =-Lb Ts +2h -1 ε q ε r ε as a constant value, which is obtained by using expressions (17) and (18).Therefore, regulation of the circulating currents is accomplished by a proportional control scheme when no constraints are active.

A. Simulation Results
Using the Plexim PLECS software, a simulation model of a 27-cell M3C with two balanced grids, connected at the input and output ports, was implemented.The parameters of the M3C-grid system are depicted in Table I with the sampling period for the controllers set to 320µs.The parameters of the controllers are shown in Table II.
1) Performance of the Proposed Control Strategy for Step Changes in the Output Load: In this section, the active power is stepped to a relatively high value on the load-side by a step-change in the d-axis current reference of the output port.Without losing generality, this test could emulate (for instance) a load impact on a motor drive.For a typical motor drive based on a PI speed controller, sudden mechanical load impacts cause a speed reduction.In order to restore the speed, the torque current component is usually increased to the maximum possible value set by the speed control output saturation level.Depending on the mechanical inertia connected to the machine shaft, the maximum torque reference could last the order of seconds, which implies that all the internal circulating currents and the input/output currents have to be adequately regulated to maintain the correct operation of the converter avoiding overcurrent in the arms.
The test starts at 0 seconds (see Fig. 5), where the d-axis current reference of the uvw port is stepped from 5A to 34A for 200ms; afterwards, it is changed from 34A to 22A.The q-axis currents of the input/output ports are set to a constant value of -1A and 1A, respectively.The simulation results are shown in Fig. 5, where the arm currents, CCVs, circulating currents and input/output port currents are illustrated.Two scenarios are considered, the first one (left hand side of Fig. 5) shows the simulation results when the arm currents are not saturated.At the right hand side the saturation scheme-B is enabled.
As shown, to maintain the energy balance, in both scenarios the sudden change of the uvw d-axis power current generates a fast increase of the d-axis power current current at the rst port, which is driven by the Total Energy Control system.As shown in the arm-currents, when the no-saturation scheme is utilised, the arm currents have initial peaks near 52A (30% higher than the 40A limit), and there are frequent and relatively high current excursions outside the 40A during the 200ms transient.For the scheme-B, the arm current peaks are decreased in amplitude to short-duration over-currents at around 42A, 5% higher than the limit.
It should be highlighted that the 5% excursions outside the predefined limit of 40A do not necessarily indicate a problem with the modelling of the system and/or a problem with the algorithm.In this work a relatively low switching frequency (for a single-edge PD-PWM) is being used to obtain the experimental and simulation results.Therefore, the current ripple in the simulation results has a peak to peak value of up to ≈ 4A which is produced by the switching.Hence, it  is concluded that most of the current excursions outside the predefined boundaries are produced by the switching ripple.Due to the sampling process, the peak ripple current is not necessarily measured and the algorithm cannot take any action to limit this value.To obtain a better regulation, the peak value of the ripple could be considered when defining the value I max [see (18)], for instance by setting the current limit to 36A instead of 40A.However, to compensate the effect of the ripple produced by PWM-related issues is considered outside the scope of this work.
For the simulation results presented in Fig. 5, using the saturation scheme-B in the control algorithm does not affect the regulation of the input/output currents of the M3C.Both the non-saturated and saturated cases show good performance in the regulation of the external port currents.Additionally, in both scenarios, the CCVs exhibit relatively high magnitude short-duration peaks at the very beginning, which are related to the natural response due to the high load impact.Although the circulating currents in the saturated case have higher values than the non-saturated ones, the arm-currents have lower peaks.This interesting feature is inherent to the proposed control strategy to maintain the cluster currents inside the predefined limits.
In Fig. 6, harmonic spectra of the input/output port currents are shown when no saturation is required, and the uvw port dq-axis currents are set to 22A and 1A, respectively.As depicted in the results, high frequency bands are centred around the carrier frequency as expected.Notice that for the simulation and experimental results presented in this work, the modulation scheme is based on a sawtooth carrier waveform (single-edge PWM scheme).This modulation method has been selected considering experimental simplicity.
2) Performance of the Strategy when CCVs constraints are active: Although the proposed saturation scheme is intended to be mainly used during transient instances, the performance of the strategy is evaluated when the output cluster voltages periodically reach their CCVs limits.This emulates a system where the addition of the peak voltages at the rst and uvw ports are comparable to the CCV values.
To enter this operating condition, the input/output port grid voltages were increased an 18%.Fig. 7 illustrates simulation results of this condition for the MPC saturation scheme-B with the output uvw d-axis and q-axis currents set to 22A and to 1A, respectively; additionally, the input rst q-axis current was set to -1A, and the d-axis current was specified according to the Total Energy Control.As part of the test, at 0 seconds a sudden change of the q-axis currents to 5A and -5A was made for the uvw and rst port, respectively.As depicted in the upper-left side graph, the output cluster voltages (v b ) have several saturation periods.The number of active constraints plot depicts each moment when one of the constrains is active.By inspecting the graphic located at the left-top of Fig. 7 it is concluded that most of the times it is a CCV-related constrain which is being active (see the saturated tops of some of the waveforms).During all the tests it is shown that the input and output port currents are unaffected when the arm is saturated, as depicted in their respective dq-axis current plots.The circulating current could have some relatively high current peaks when a constraint is active, but the arm currents do not surpass the maximum limit of 40A when these peaks occur.
3) Comparison of MPC scheme-B with a Saturation Method based on Linear Controllers.: To compare the arm current saturation performance of the proposed strategy with previous works, such as those reported in [2], [15], a comparison of the MPC scheme-B with a current limitation scheme based on adjusting the value I sat ε is presented [see Fig.  linear approach is not an unfair comparison.In previous work considering linear controllers (see [9], [15]), each PI controller related to the stored energy balancing control is limited to an independent saturation value I sat ε , and there are no additional current saturation schemes implemented in the downstream control stages.In the MPC case, each PI saturation limit is set to an apparently large value of I sat ε =30A; however, in the circulating current scheme, the MPC strategy additionally limits the magnitude of the circulating currents to fulfil the restriction of having a total current in the cluster below I max =40A when it is required [see (18)].Therefore, some of the components of the circulating currents shown in Fig. 8.(b) reach a higher peak than those depicted in Fig. 8.(a) between 0< t <40ms and this allows faster balancing of the capacitor voltages.This faster response is produced because the MPC algorithm manages to utilise more circulating current, without surpassing the maximum value allowed in the total arm current.Conversely, as discussed in Section I, linear controllers saturate each component of the circulating current separately, using an heuristic criterion (see [15], [16]), rendering suboptimal performance.In summary, in the MPC strategy, the algorithm optimally decides the maximum circulating current component which can be applied at a particular operating point, aiming to achieve the lowest circulating current error with the active constraints.This is a very important feature during transient operation, where saturation of the arm currents is more likely, such as the case demonstrated in section V-A1.
In the linear controller-based case, the circulating current control is regulated by P-controllers, as shown in (38); additionally, the parameters of the input/output port current controller and the stored energy controllers are identical to those used in the MPC strategy.
To compare both saturation methods, the following Transient Balancing Test (TBT) is performed: the energy stored in the capacitors of the M3C is intentionally unbalanced at t<0 by using non-zero references for the energy balancing controllers depicted in Fig. 3(b).At 0 seconds, the references for the ψ values representing imbalances i.e are step changed to zero to induce high circulating currents for balancing the converter energy.Furthermore, to induce an extreme unfavourable scenario, the q-axis references are stepped from 1A to 10A at the uvw side, and from -1A to -10A at the rst side at 10ms.The d-axis current of the uvw-side is fixed during the test at 24A.
As illustrated in Fig. 8, at 0 seconds, the circulating current injection increases for both schemes, with their respective arm current values remaining within the margin of ±40A, with minimal peaks above the limits.Although the peak values of the circulating currents for the linear case are lower, the arm current peaks have higher values than the MPC strategy.Moreover, the arm currents in the MPC strategy remain within the predefined limits and the balance of the capacitor voltages for the linear scheme takes nearly 20ms longer than the MPCbased strategy.This feature is achieved due to the MPC saturation scheme, which is required during specific periods of the test and allows a higher value of I sat ε .The saturation is active during short periods, especially when the circulating currents reach the initial peaks.
4) Performance of the Saturation Scheme-A Considering Different Sampling Frequencies: As discussed before, to implement the saturation scheme-B, estimation of the input/output port currents i αβ0,k+1 is needed.However, if the input/output port models are not known, the approximation of i αβ0,k+1 =i αβ0,k can be an attractive alternative.
In this section, simulation results of a TBT test was made for scheme-A at two different sampling periods:(a) 320µs and (b) 106.67µs.For both cases, the system conditions and controller bandwidth of the stored energy and the output current controllers were the same.The d-axis current reference of the uvw-side was set to 24A, and the q-axis references are stepped from 1A to 10A at the uvw side, and from -1A to -10A at the rst side at 10ms.The CCVs reference level was 400V.The results are illustrated in Fig. 9, where the arm currents, number of active constraints and CCVs are included.
As depicted in the arm currents for the two cases, the peaks where the current exceed the predefined limit are significantly reduced from nearly 46A (15% above the limit) to 41A (2.5% above), when the sampling period is reduced from T s =320µs to T s =106.67µs.As shown in the corresponding CCVs plot, the balancing controllers exhibit the same behaviour and duration for balancing the clusters.From these results it can be established that scheme-A gives reasonable results when the sampling frequency is increased.

B. Experimental Results
To experimentally validate the proposed MPC strategy, an experimental prototype of a M3C employing 27 H-bridge modules was implemented (see Fig. 10).The control platform has a Texas Instrument 6713C DSP board, three Actel A3P1000 FPGA boards and additional external boards for analogue to digital conversion and for computer communication with the DSP.Each arm of the M3C is based on three H-bridge modules with one L b =2.5mH inductor, and each module has a 4.7mF/200V capacitor.At input port rst, an Ametek Programmable Power Source Model CSW5550 is connected in series with inductances of L rst =5mH, whereas at output port uvw another Ametek Programmable Power Source Model MX45 is utilized with L uvw =2.5mH filters.These inductances (L uvw and L rst ), represent the Thevenin impedances of the power sources connected to the M3C ports [see Section III-B1] which have been selected based on laboratory availability.
The DSP sample-time and PWM-carrier period are T s =320µs, the DC-voltage reference for all modules is 127V, the arm currents limit is I max =12A, and the linevoltage/frequency of the grid connected at rst-input port is 182V/50Hz.The parameters of the controllers of the M3C are shown in Table III.
1) Performance of the MPC strategy Considering Different Voltage and Frequency in the External Ports.: To show the performance of the MPC scheme at different output frequencies, the voltage and frequency of the programmable power source at the uvw port was programmed for a ramp variation  from 182V/45Hz to 90V/20Hz and vice versa in ≈ 1.25s.For the whole of this test the d-q axis current references uvw are set to 1A and 5A respectively.At the rst-input port, the q-axis reference is also constant at -5A whereas the d-axis reference is defined by the Total Energy Control system [see Fig.The experimental results for this test are shown from Fig. 11 to Fig. 13.The two upper plots of Fig. 11 illustrate the instantaneous grid voltages at the uvw port, where the amplitude variation can be identified; the right upper plot shows the grid-frequency of both the uvw and rst ports.The two middle graphics show the peak grid voltages for both ports and the Cluster Capacitor Voltages (CCVs).The lower graphics depict the dq-axis currents of the uvw and rst ports, respectively.From these experimental results it is concluded that the dq-axis uvw output currents follow their respective references with negligible tracking error, while the d-axis reference at the rstinput port changes according to the active power demanded by the total energy control system.Notice that in this test the power at the port uvw is not constant because the uvw voltage varies between 182V to 90V with constant d-axis current reference.As shown in the middle right-side graphic, this dynamic variation produces small low frequency oscillations in the capacitor voltages.
Additional results corresponding to this experimental test are shown in the scope waveforms illustrated in Fig. 12.The steady state performance at 20Hz is shown in Fig. 12(a) and at 45Hz in Fig. 12(b).Notice that the system is stable with low distortion in the input and output current waveforms.The input/output currents i r , i u , and arm currents i b1 , i b4 are also shown in Fig. 12.Additionally, harmonic spectra of the port currents, when the output side frequency is 20Hz, are shown in Fig. 13.From the spectrum depicted in this figure it is concluded that there are relatively high frequency components which are centred at 3.125kHZ, which is the carrier frequency.Additionally, just as observed in Fig. 6, low-order harmonic content is present for both port currents.The magnitude of the low frequency components could be improved by using a triangular waveform as a carrier (instead of a saw-tooth waveforms) and optimising some features in the experimental system.However, the current in the grid side THD (input port) is below 5% which is lower than the maximum value of grid-side THD recommended in the EEE Std-519-2014 (see [41]) and it is considered appropriate for this application.The output port side (load-side), working at 20Hz, has higher lowfrequency harmonic content in comparison with the input side.This difference is produced because the output port inductance is lower than the input port inductance.2) Comparison of Performance Achieved by the Proposed Saturation Schemes.: The experimental test used in this subsection is designed to demand high magnitudes of circulating currents that exceed a predetermined arm-current limit.This allows experimental verification of the saturation schemes discussed in Section IV.
In order to compare the performance of the saturation scheme-A and -B, a TBT (described in section V.A.2) is performed with the power source at the rst side set to 182V/50Hz, and the uvw power source set to 182V/25Hz.Balancing of the CCVs starts at t ON =0s, followed by a transient at t Q =20ms when the q-axis reference is stepped from 1A to 4A (445Var to 1782Var) at the uvw side, and from -1A to -4A (-445Var to -1782Var) at the rst side.The d-axis uvw current reference is set at 6A (2670W).The results of this test for the strategy without saturation, and for Scheme-A and Scheme-B (considering I max = 12A) are shown in Figs.14-17.
As shown in Fig. 14, when no saturation scheme is used, the arm currents reach peak values near 20A and exceed the defined ±12A limits several times.The input/output port currents are unaffected during the balancing of the CCVs, which lasts around 95ms.On the other hand, as shown in Fig. 15, the arm peak currents are limited with saturation scheme-A, but there still are a couple of short-duration current peaks close to 17A.In scheme-B the arm currents are mostly inside the predefined limits, with few undesirable spikes that surpass the ± 12A band, reaching a maximum value of ≈ 14A.Notice that the circulating currents have some high-frequency oscillating components which are produced by a combination of switching ripple and the fast dynamic response typically achieved by the predictive control algorithms.However, these oscillations in the circulating currents are not reflected in either the uvw or in the rst output port currents because the proposed CCS-MPC maintains even the fast oscillations of the circulating currents within the defined constraints.
As depicted in Fig. 15, scheme-B exhibits better arm current saturation performance than that achieved by scheme-A, maintaining the arm currents mostly inside the predefined band.In comparison with the unconstrained results shown in Fig. 14, CCV imbalance is corrected more rapidly when the non-saturation scheme is applied, but this is achieved by increasing the arm currents above the predefined limits.The step changes in the active and reactive dq-currents at the rst-input and uvw-output ports are also shown in Fig. 15.According to the experimental results, the proposed saturation scheme included in the control strategy does not affect the dynamic or steady state performance of the input/output port currents, confirming that decoupled operation is achieved.
As shown at the lower part of Fig. 15, the number of activated constraints during the test for scheme-A and -B differ considerably.For scheme-A, there is mainly one active constraint for most of the transient, but there are some instances during the test where two constraints are activated simultaneously.Analysing the experimental data it is concluded that this occurs when both the upper and the lower current limits are reached in some of the arms.On the other hand, for scheme-B, there are more instances when two constraints are active in comparison with scheme-A.Even more, up to three arm-current constraints are activated simultaneously at a specific instant, achieving a better limitation of the arms currents than that obtained by scheme-A.
In Fig. 16 the currents in the ports uvw and rst are shown, as well as two arm currents i b1 and i b4 .Figs. 16(a), (b), (c) show the experimental results for the no saturation scheme, saturation scheme-A and saturation scheme-B respectively.For all the schemes it is concluded that the output currents are not affected by the large changes in the circulating currents (after t ON ) confirming that the operation of the proposed M3C control system achieves decoupled operation.
In Fig. 17 the four circulating currents are shown for the three saturation schemes studied in this work.These values have been obtained using the data acquisition system embedded in the control platforms.Fig. 17 (a) depicts the performance of the non-saturation scheme and Fig. 17 (b) shows the performance of the scheme-A and scheme-B respectively.Of course the tracking performance is better for the non-saturated case because the control algorithm does not consider the constrains to limit the circulating currents.
As shown in Fig. 17 (b), the effects of the proposed saturation algorithms are clearly shown in the circulating current waveforms.Although relatively high-frequency oscillations are produced when the saturation scheme is activated, these values are not necessarily reflected in the arm currents in the natural coordinate domain.To reinforce this idea, notice that the tracking of the circulating currents is worst when the saturation scheme-B is used, which has better saturation performance than scheme-A.This behaviour is inherent in the MPC algorithm, because there is a trade-off between good tracking of the circulating current references and proper limitation when the maximum set values are reached by the arm currents.

VI. CONCLUSIONS
This paper has presented a continuous-control-set model predictive control strategy for regulating the circulating currents of an M3C.The proposed methodology considers the maximum currents allowed in each cluster as constraints as well as the maximum voltage which can be synthesised by a given cluster without producing overmodulation.The most important feature of the proposed strategy is that the MPC employed includes a saturation scheme that regulates the thermal limit of the arm currents of the M3C and the saturation of the arm output voltages.These features are attractive during high demand of circulating currents in transient conditions.The proposed saturation scheme is conveniently integrated into the MPC formulation for the regulation of the circulating currents.To solve the intrinsic optimisation problem formulated from the MPC, an Active-Set algorithm, suitable for experimental implementation, is integrated into the proposed control methodology.
Two control schemes are derived (A and B) in this work.In scheme-A the model of the load/grid is not known and the prediction of the output currents is replaced by the sampled measurement.On the other hand, in scheme-B the models of the load/grid are known and are integrated in the algorithm.The simulation and experimental results are promising and validate the usefulness of the proposed strategy and algorithm.The attractive features of the scheme are shown during transient operation, where the saturation scheme performance is adequate for a sampling and carrier period of 320µs.Scheme-B has better regulation of the arm currents than scheme-A during transient operation.However, it is shown that the inherent prediction error of scheme-A is reduced when the sampling frequency is increased.
As discussed in this paper, saturation and thermal protection are important tasks which are very difficult to address using conventional linear controllers considering that, in a typical modular multilevel matrix converter, each cluster current has components of several frequencies and positive and negative sequences.Therefore, using linear methods it is difficult to implement optimal limitation of these circulating currents and, at the same time, to avoid affecting the input/output currents.However, this task is simple to achieve using the CCS-MPC methodology that, unlike conventional FS-MPC strategies, is suitable for experimental implementation with present control platforms.In addition, the MPC approach discussed in this work is utilised to regulate only the circulating currents providing saturation when required.This strategy has less computational processing time in comparison with the burden which would be expected if an overall control of the modular multilevel matrix converter were implemented using an MPC-based approach.Nevertheless, even though the proposed control scheme may have less controllability, the advantages of the proposed strategy, demonstrated using several experimental and simulation tests, have been clearly identified, i.e. when the arm voltages and/or currents reach the specified bounds, they are modified in order to operate the arm-voltage/-current magnitudes within the limits, without affecting either the input or output port currents.
To study and implement a more complex global MPC control scheme for modular multilevel converters will be the subject of a future publication.

Fig. 3 .
Fig. 3. Stored Energy Control of the M3C.(a) Total Energy Control and (b) Balancing Energy Control.

Fig. 6 .
Fig. 6.Simulation results of input and output port currents when i ref d =22A, i ref q =1A in the uvw port, and i ref q =−1A in the rst port.(a) Harmonic spectrum of input port current ir; (b) Harmonic spectrum of output port current iu.
3.(b)].For both cases, the arm current saturation limit is set to I max =40A, while the saturation values of the stored energy PI-controllers are set to I sat ε =5A for the scheme based purely on linear controllers and to I sat ε =30A for the MPC based scheme.It is necessary to mention that defining I sat ε =5A for the

Fig. 9 .
Fig. 9. Simulation results of saturation scheme-A with TBT at different sampling periods.(a) Scheme-A at 320µs (b) Scheme-A at 106.67µs.

Fig. 11 .
Fig. 11.Experimental results of the proposed MPC strategy with cyclic variations on voltage/frequency at the uvw-port power source.

Fig. 14 .
Fig. 14.Experimental results for the TBT without a saturation scheme.

Fig. 16 .
Fig. 16.Experimental results of output and arm currents of the M3C during TBT.(a) MPC strategy without saturation scheme, (b) MPC strategy with saturation scheme-A and (c) MPC strategy with saturation scheme-B.

Fig. 17 .
Fig. 17.Experimental results of circulating currents with their respective references during Dynamic test.(a) MPC without Saturation, (b) Scheme-A and Scheme-B.

TABLE III CONTROLLER
PARAMETERS OF THE EXPERIMENTAL SET-UP