Power Quality Improvement Using an Active Power Sharing Scheme in More Electric Aircraft

This article proposed a harmonic suppression scheme that used a dc-dc converter as an active harmonic injector to cancel voltage harmonics on the HVdc bus within a hybrid power generation centre (HPGC). A permanent magnet synchronous generator and a battery are considered to supply power to a common HVdc bus through their dedicated ac-dc and dc-dc converters respectively within the HPGC. We proposed simplified mathematical models of harmonics from the ac-dc and dc-dc converters. Thereafter, an active power sharing scheme between the PMSG and the battery is developed to control the magnitudes of targeted harmonics to be the same. The targeted harmonics on the HVdc bus can thus be cancelled by properly tuning the carrier signal phase angles within ac-dc and dc-dc converters. A closed-loop control scheme has been developed and this scheme is with no extra hardware cost. To demonstrate the effectiveness of the proposed scheme, we selected the first-band harmonic (fc − 3f0) as the targeted harmonic component. The harmonic cancellation scheme for this component has been developed and validated using experimental results. It has been demonstrated that the proposed method can achieve over 90% reduction of this specific harmonic component on the HVdc bus within this HPGC using one dc-dc converter.


I. INTRODUCTION
T O ACHIEVE more efficient and environmentally friendly solutions of travel, more electric aircraft (MEA) concept is one of the major trends towards future aerospace development [1], [2]. Onboard MEA, pneumatic, hydraulic, and mechanical subsystems are replaced by their electrical equivalences, which results in a significant increase in power demand. To supply electrical loads onboard, the common dc bus architecture has received significant attention these days [3], [4]. With the common dc bus architecture, electrical generators are supplying a dc bus through an ac-dc converter together with energy storage elements. As shown in Fig. 1, the dc bus is supplied by an electrical generator and a high-voltage battery through their dedicated converters. Also, a permanent magnet synchronous generator (PMSG) is used to extract electrical power from the high-speed engine shaft. An energy storage system (ESS) with a battery is integrated for the flexible operation of power flow. These two power sources, together with a high-voltage bus capacitor, form a hybrid power generation centre (HPGC), as shown in Fig. 1.
With such a structure, expected benefits include less need for cables, high flexibility of power management, and higher redundancy ability under fault conditions. The hybrid dc power generation system has been widely considered not only for the MEA but also for hybrid vehicle [5], ships [6], and microgrid [7].
In the HPGC system shown in Fig. 1, the capacitor bank is used to filter out high-frequency fluctuated currents and flatten the dc-bus voltage, such that the dc-bus voltage meets the DO-160E [8] and MIL-STD-704F [9] standard. However, the capacitor is always bulky and expensive. With reduced harmonics, reduced size and weight of the dc-bus capacitor can be achieved. This, in return, gives the system a higher efficiency, reduced mass and lower fuel consumption. Furthermore, with lower harmonics, the capacitor lifetime is extended as well [10].
Active suppression methods have attracted more attention to suppressing harmonics on capacitors due to their flexibility and high performance. The fundamental idea of those methods is to adjust the switching actions of power converters to minimize the harmonics.
Adding an extra circuit is the most straightforward solution for reducing capacitor harmonics generated from switching frequencies [12]- [15]. This kind of methods can be implemented on all systems with power electronic devices. However, it requires extra elements and thus increases the cost and complexity of systems.
Some researchers have investigated harmonic suppression in the second switching frequency for the dc power system [16], [17]. However, the first-band harmonics are not considered, which contributes more to dc-link fluctuation when the PMSG works under high modulation index [18]. In [19], the authors proposed a dynamic pulse width modulation (PWM) interleaving method to suppress the first-band harmonic. However, as a side effect of this method, the ac harmonic current of PMSG deteriorates, which limits its application on MEA.
In this article, we proposed a new power-sharing control scheme to achieve power sharing (between PMSG and the battery) and harmonic suppression at the same time. Through active power sharing, magnitudes of harmonic components from the ac-dc and dc-dc converters can be actively controlled. Controlling targeted harmonic components (f c − 3f 0 component studied in this article) from the ac-dc and dc-dc converters of the same magnitudes, appropriate phase shifting between those harmonic components will enable the harmonic suppression and cancellation.
This article is a follow-on research of our previous publication [16], where harmonics of two ac/dc power converters have been actively controlled with one ac-dc converter used as a harmonic sink. In this article, we focus on using the dc-dc converter as an active harmonic damping device to suppress the first carrier sideband harmonic (f c − 3f 0 frequency harmonic component from one ac-dc converter). Although we select some specific harmonic components for suppression, the proposed method can essentially be used to suppressing any harmonic component of interest by simply changing the feed-back component.
The article is organized in the following manner. Sections II and III present basic mathematical analysis of switching harmonics generated from the ac-dc and dc-dc converters, respectively. Based on the mathematical models, Section IV illustrates an enhance harmonic suppression method by adjusting power sharing between PMSG and ESS system and actively tuning the phase-shift angle of the carrier signals. Section V gives the experiment results of the proposed method. Section VI concludes this article.

II. MATHEMATICAL MODEL FOR DC-BUS CURRENT HARMONICS ON A TWO-LEVEL CONVERTER UNDER THE SINUSOIDAL PWM (SPWM) OPERATION
In the system shown in Fig. 1, the PMSG supplies electrical power to an HVdc bus through an ac-dc converter, with details shown in Fig. 2(a). To develop a harmonic cancellation scheme for the HVdc bus, it is essential to derive the mathematical model of its harmonics before the capacitor. In this study, a standard two-level ac-dc converter is considered for ac-dc conversion because it is known as the most used rectifier for PMSG based power generation system. It is assumed that the common asymmetrical regular sampling PWM is implemented in the ac-dc converter, as shown in Fig. 2(b). Due to the converter switching actions, dc-link current i dc will be with harmonics as shown in Fig. 2(c) with its spectrum. It can be noticed that significant components of the current harmonics are observed in f c ± 3f 0 and 2f c . Here, f c is the switching frequency, f 0 is the fundamental frequency from PMSG. Harmonics in higher frequencies are not considered because of their lower impact on the dc-bus.
In our recent publication [16], the 2f c harmonic component has been studied in detail. In this section, we will focus on the development of the mathematical models of (f c ± 3f 0 ) harmonics.

A. Mathematical Analysis of DC-Bus Harmonic Based on Double-Fourier Method
The double Fourier method is commonly used to study the harmonics of PWM operation [18]. Some analysis has been investigated in [16], which will be briefly reviewed here.
Assuming the current on the ac side is ideally sinusoidal for a two-level converter, ac side currents can be written as where I ac is the amplitude of the fundamental component of ac current, f 0 is the fundamental frequency, β is the angle between phase current and its ac side voltage, k = 0, 1 and 2 represent phase A, B, and C, respectively.
Assuming the positive current on dc bus (i dc ) is from the converter to the dc-link capacitor, as shown in Fig. 2(a). Its switching function for each phase leg can be expressed as where f c is the switching frequency, θ c [k] is the phase angle of the triangular carrier signal for each leg, α is the phase angle between ac fundamental current and ac-side converter voltage (i.e. power factor angle), K m,n is the harmonic amplitude using the Bessel function of the first kind. Based on double Fourier analysis [18], K m,n can be expressed as In (3), J n () is the Bessel function of the first kind. m and n are orders of switching harmonic and its sidebands respectively. For instance, when m = 1 and n = 3, K m,n means the magnitude of harmonic with a frequency of f c + 3f 0 . Using (1)-(4), the dc-bus harmonic currents generated from one phase leg can be derived as m,n and ϕ [k] m,n are phase angles of each component, which are Extracted from (5), the dc-link current harmonics in a specific frequency (if c + jf 0 ) should be expressed as a sum of components from three legs as where i and j mean switching and band side orders of dc-bus current harmonics. For instance, substituting i = 1 and j = 3 into (8) gives the expression of harmonic in the frequency of f c + 3f 0 . Here, we use a superscript [g] indicating this harmonic is associated with the generator connected to the ac-dc converter and is to differentiate it from the dc-dc converter harmonic, which will be discussed in the later sections.
B. Harmonics on f c ± 3f 0 As shown in Fig. 2(c), significant harmonics appear in the frequencies of both f c − 3f 0 and f c + 3f 0 . Furthermore, along the whole spectrum, their magnitude cannot be ignored.
This subsection will analyse the harmonic in f c − 3f 0 first. Considering no phase shift on carrier signals among the three legs, i.e., θ For the coefficient K 1,-4 and K 1,-2 , we have Assuming that f c >> f 0 (in typical cases, f c is at least 20 times the frequency of f 0 ), the term f 0 /f c can be neglected as it is approximately equal to 0. Then, (9) can be approximated as expressed in (12) i Comparing the two terms in (12), their magnitudes have different Bessel functions and are given in (13) In (13), modulation index (M) is always less than 1, because of the limited output voltage of the ac-dc converter. Comparison between the two Bessel function terms when M < 1 is shown in Fig. 3. It can be seen that J 4 (πM/2) is almost zero, and J 2 (πM/2) is more than 20 times the magnitude of J 4 (πM/2). Hence, the first term is neglectable in (12). Therefore, the expression in (12) becomes as in (14) i With (14), its magnitude is convenient for a controller to calculate. There, M will be a fixed value if PMSG works under flux-weakening operation (which is a normal case for aerospace application). I ac is measured by current sensors which is given as where i d and i q are the d-and q-axes currents of the PMSG. Apart from magnitude, the phase angle of the component in (14) can be derived from (7) which gives the expression as where β is the angle between phase current and its ac side voltage, α is the power factor angle. Both of them can be achieved from voltages and currents in dq-frame, which are Here, the function atan2(y, x) gives the angle of complex value (x + iy). Therefore, the magnitude (I dc,1,-3 [g] ) and phase angle (θ dc,1,-3 [g] ) of the harmonic in f c − 3f 0 can be summarized from (14) to (18) as Following the same process, the magnitude and phase angle of the harmonic in f c + 3f 0 can be calculated and simplified as From (19) and (21), it is important to notice that the simplified magnitudes of these two components of frequencies f c − 3f 0 and f c + 3f 0 are essentially the same. A comparison between the simplified magnitudes and original models is given in Fig. 4(a). The error is always less than 3 A, which is less than 10% of the original model. Meanwhile, the phase angle between the simplified model and the original model is also neglectable (less than 0.05 rad), as shown in Fig. 4(b). Therefore, the simplified model can be adopted and used for the harmonic suppression method.
From Fig. 4, it is important to note that the simplified magnitudes of the f c − 3f 0 and the f c + 3f 0 components will have the same increment when more power is generated from the PMSG. This is a useful finding for harmonic suppression and will be discussed in Section IV.

III. HARMONIC ANALYSIS OF A DC-DC CONVERTER
This section will discuss harmonic generated from a typical buck-boost dc-dc converter. As shown in Fig. 5, the bidirectional buck-boost dc-dc converter consists of two power switches (S1 and S2) with antiparallel diodes and a filtering inductor L b . The port on the left is connected to a battery with a voltage V b , and the port on the right is connected to a dc-bus with voltage V dc . This dc-dc converter allows the battery to work under both charging and discharging modes.
Within the hybrid electric power generation centre, a secondary level supervision unit is used to provide the reference power (thus defines inductor current i L ) to the dc-dc converter local control. When i L > 0, the current flow from the battery to the dc-link. The dc-dc converter operates under boost mode and the battery is in the discharging mode. On the contrary, when i L < 0, the dc-dc converter operates under buck mode and the battery is in discharging mode.
Typical PWM generation diagrams of the dc-dc converter are shown in Fig. 6(a) and (b) (battery is in discharging and charging mode). PWM signals are generated to control switches S1 and S2. The switching behaviour of these switches causes the dc-link current ripples. In Fig. 6, the switching signals are generated by comparing the duty cycle reference and carrier signal with a triangle waveform. The period of a carrier signal is defined as T [b] . The average of the dc current i dc [b] and its contained harmonics are dependent on the power reference (and thus i L ). Similar to ac-dc converters, the i dc [b] harmonics phase angle can be controlled by shifting the phase angle of the carrier signal.
Similar to ac-dc converters, harmonics in switching frequencies are difficult to measure. Hence, their mathematical modeling is critical for harmonic suppression of the dc-link capacitor.
To simplify the analysis, the inductor current is assumed to be constant as I L , and the converter works under continuous current mode. Then, the current in one cycle flowing into the dc-bus capacitor, i dc [b] , is given as Considering the symmetry and using Fourier expansion, the current i dc [b] can be expressed as where From (24), it can be seen that the phase angle of current i dc  Fourier coefficients in (24) are derived as This article focuses on suppressing the first-order harmonic on dc-link capacitors. Substitute k = 1 into (24) and (27), the harmonic in f c [b] , which is i dc, 1 [b] can be expressed as where From (29), it can be observed that the magnitudes of harmonic components I dc , 1 [b] is proportional to the inductor current I L . There, when I L > 0, the battery operates under the discharging mode. When I L < 0, the battery operates under the charging mode. With a higher output/input power, I dc , 1 [b] will be with a can further be set to be the same as that of the targeted harmonic component on the HVdc bus. Thus, the dcdc converter can potentially be used to cancel some specific harmonics on the dc bus as discussed in the following section.

A. Proposed Method
The hybrid generation centre with more details is shown in Fig. 7. Within such a system, a PMSG supplies power to an HVdc bus through an ac-dc converter. A high-voltage battery supplies power to the HVDC bus (270 V) via a dc-dc converter. Both converters share the dc-link capacitor. The ac-dc converter and the dc-dc converter are controlled with their local primary controller.
A system controller is used for high-level supervision (secondary) control. The system-level control is to define power sharing between PMSG and the battery by defining their power references (i dc [g] * and i L * ). The local controllers thus control converters of the PMSG and the battery individually. This way the voltage regulation can be achieved.
This article focuses on harmonic suppression in the frequency of f c − 3f 0 . In Fig. 7, two converters will inject required DC currents on this frequency to the HVdc bus.
The local control diagram of PMSG is shown in Fig. 8. A cascaded control structure has been used, with the current control being the inner loop. A flux-weakening control is applied in the outer control loop. This is due to the fact that in MEA applications, PMSG is driven by the high-speed shaft of an aircraft engine. The stator output voltage v 2 d + v 2 q is controlled by injecting a negative flux current component i d .
The output current i dc of the ac-dc converter is also controlled with its reference i dc  − 3f 0 can be derived, with its magnitude I dc1,-3 [g] and its phase angle θ dc1,-3 [g] from (19) and (20). The fundamental frequency (f 0 ) can be obtained from a machine speed sensor. These features of the f c − 3f 0 component, i.e., magnitude, frequency, and phase angle are then sent to the controller of the dc-dc converter and the system controller.
The cancellation scheme of the harmonic component of f c − 3f 0 from the ac-dc converter is essentially based on the fact that two sinusoidal currents of the same magnitude will cancel each other if they are 180 o phase shift to each other. With this fact, we can use the dc-dc converter as an active harmonic injection source to cancel the f c − 3f 0 harmonic component from the ac-dc converter. This approach has the advantage of not requiring extra hardware to the system since the dc-dc converter is an integral part of the HPGC. To achieve that, the frequency of the carrier signal (f c [b] ) of the dc-dc converter should be set to f c − 3f 0 i.e.
To achieve the phase angle difference of 180 o between the two harmonics, the phase angle of the PWM carrier signal should be adjusted according to (20) and the battery's working status (discharging or charging). When the battery operates under discharging mode (I L > 0), both the f c − 3f 0 harmonic magnitudes of the ac-dc and dc-dc converters (I dc,1,-3 [g] and I dc , 1 [b] ) are positive, which can be derived from (19) and (29). With (20), the phase angle of the dc-dc converter's PWM carrier signal should be set as (31) Then, a phase angle difference of 180 o between two harmonics can be achieved. On the contrary, when the battery operates under the charging mode (I L < 0), I dc , 1 [b] becomes negative, and thus the phase angle of the PWM carrier signal should be  set as is the phase angle of the carrier signal of the dc-dc converter.
Therefore, the carrier signal frequency (f c [b] ) and the phase angle (θ c [b] ) can be selected based on the harmonic information sent from the PMSG controller. The control diagram of the dc-dc converter is shown in Fig. 9. The magnitude of the f c [b] harmonic from the dc-dc converter (I dc , 1 [b] ) is also calculated using (29). This will be used in the system controller in the next discussion.
The control scheme of the dc-dc controller only gives a 180°p hase difference between components generated from the ac-dc and dc-dc converters. To fully suppress the harmonic on the dc-link capacitor, the magnitudes of the two components need to be adjusted to the same value. Such an adjustment is achieved in the system controller, as shown in Fig. 10.
In the harmonic control block of Fig. 10, magnitudes of two components (I dc,1,3 [g] and |I dc,1 [b] |) are controlled to be the same by a PI controller. If |I dc,1 [b] | is lower than I dc, 1,3 [g] , the proportional integral (PI) controller will give a higher |i L * | to increase |I dc,1 [b] |. Here, the absolute value of the magnitudes is taken to make the control feasible under either the discharging or charging mode of the battery.
Meanwhile, another PI controller gives the total DC current reference i dc * to control the dc link voltage V dc . Then the reference of PMSG output current is also achieved from i dc * and i L * according to the discharging/charging mode of the battery. In power management of the power generation system, the state of charge (SOC) of the battery is one of the major concerns. Generally, the SOC of a battery should be within a required range. The battery should be discharged when the SOC is over the upper limit and be charged when the SOC is under the lower limit. In Fig. 10, the system controller also integrates a SOC controller to determine the discharging/charging mode of the battery. The drawback of this concept is that the charging and discharging speeds of the battery are limited by the harmonic suppression effect. This issue is a tradeoff and can be further studied in the future.
In a system without a centralized controller, the voltage control block and harmonic control block can be distributed into the local controllers of the PMSG and the battery. A similar harmonic suppression effect can be achieved. However, this is not what this article focuses on, and will not be discussed in detail.

B. Discussion on the f c + 3f 0 Harmonic Component
As discussed in previous sections, the proposed method is with two actions: adjusting the switching frequency of the dcdc converter and adjusting the power sharing ratio to control |I dc,1 [b] | to be the same as I dc,1,-3 [g] . With the first action, the proposed method should eliminate the components on dc-link currents in both the frequencies of f c and f c − 3f 0 . This shows the superiority of the proposed control method when comparing to the conventional control. However, for the second action, although the magnitude of the f c − 3f 0 component is suppressed to zero, the f c + 3f 0 component (from the ac-dc converter) varies when changing the output power of the PMSG. Hence, this section will discuss the sum value of the first-band harmonics on the dc-link current.
When the f c − 3f 0 components from the ac-dc and dc-dc converters counteracted each other with a 180°phase difference, the total harmonic in the first switching band (I dc,1,total ) can be expressed using the simplified harmonic models in Section II.
where I dc,1 [g] is the simplified magnitude of the f c − 3f 0 and the f c + 3f 0 components from the ac-dc converter (discussed in Section II-B), I dc, 1 [b] is the magnitude of the f c − 3f 0 component from the dc-dc converter when its switching frequency is adjusted to f c − 3f 0 . In (33), term |I dc,1 [b] -I dc,1 [g] | is the summed absolute harmonic on the dc-link current in the frequency of f c − 3f 0 (from the ac-dc and the dc-dc converters together) and the term I dc, 1 [g] is the harmonic in f c + 3f 0 (from the ac-dc converter only). Considering the value of I dc,1 [b] and I dc,1 [g] , (33) can be When I dc,1 [g] ≤ I dc, 1 [b] , and the dc-dc converter operates under the boost mode, if we increase the power of the battery and thus the power of the PMSG is decreased, then the total first band harmonics will be increased because total harmonic in this case [I dc, 1 [b] , as shown in (34)] will increase because of the increase of the battery power.
On contrary, when I dc,1 , if we decrease the battery power and thus PMSG power will be increased. Then, I dc,1 [g] will increase and I dc,1 [b] will decrease. The total power [2I dc,1 [g] -I dc, 1 [b] , as shown in (34)] will also increase because of an increased term (2I dc,1 [g] ) minus a reduced term (I dc,1 [b] ) gives a higher value.
Hence the total harmonic is at its lowest level when I dc,1 [g] = I dc, 1 [b] . This proves that the proposed power sharing adjustment gives the best operation point for suppressing the total first band switching harmonics. When the battery operates under the buck mode, the harmonic is more complicated. However, with a proper phase-shift between the two converters, both the harmonics in f c and f c − 3f 0 can be suppressed. Maybe it is not the best operation point (f c + 3f 0 could be higher), but the harmonic suppression is still effective compared to the conventional control.

A. Simulation Study
To evaluate the performance of the proposed harmonic model and cancellation method, a simulation is implemented on MAT-LAB/Simulink and PLECS. It includes a PMSG, an ac-dc converter, a battery, a dc-dc converter, capacitors and the load. Some basic control parameters are given in Table I. In the simulation, the PMSG is the one developed in [20]. As the simulation time elapses, the simulation is divided into three cases, as shown in Table II.
The simulation results are shown in Fig. 11. Before the time 10 ms, the output power of the system is 40 kW and no harmonic suppression algorithm is applied. The power sharing ratio between the PMSG and the battery is set as 1:1. The ac-dc converter and the dc-dc converter share the same carrier signal. For the dc-link currents in this case (i dc [g] , i dc [b] , i cap ), the PMSG generates significant components in frequencies of f c ± 3f 0 and  Then, the proposed harmonic suppression scheme is applied at 10 ms, the switching frequency of the dc-dc converter should be adjusted as f c 3f 0 (29kHz in this case). The inductor current of the dc-dc converter is also adjusted from 100 to 90.3 A to fully suppress the f c − 3f 0 harmonic on the dc-link. In the zoom-in view, the current variations are reflected on the magnitude of pulses on i dc [b] . i dc [g] and i dc [b] tend to counteract each other as shown in the current waveforms, and thus a suppressed f c − 3f 0 harmonic on the dc-link compared to Case 1 can be achieved, as shown in the spectrum of i cap in Case 2. The f c − 3f 0 harmonic is reduced from 39.49 to 1.98 A (94.8% reduction).
After the time of 15 ms, the output power is required to change from 40 to 60 kW. The references of the dc-link currents change according to the new working status. With the proper power sharing and phase shift angle, a suppression of i cap can be achieved when the output power is 60 kW. Compared to the spectrum in case 2, the magnitudes of i cap components in the frequencies of f c + 3f 0 , 2f c are increased because of higher output power of the ac-dc converter. However, the f c − 3f 0 harmonic on the dc-link is still suppressed to 2.38 A. Compared to the f c + 3f 0 component (48.31 A), which was not suppressed, the reduction is about 95.1%. Therefore, the simulation validates the dynamic performance of the proposed method.

B. Experiment Study
To validate the proposed harmonic cancellation scheme, an experimental rig has been set up as shown in Fig. 12. To simplify test rig setup, PMSG is represented by a programmable ac source together with three-phase inductors. A phase-locked loop (PLL) is implemented in the controller to achieve phase angle of fundamental ac voltages. The battery is represented by a dc power supply which is connected to the dc-dc converter. Since the harmonic cancellation scheme is related to ac-dc and dc-dc converter, using a three-phase ac source and a dc power supply to represent the PMSG and battery respectively will not affect the effectiveness of the proposed harmonics cancellation scheme. The dc source is used to represent the battery with a constant voltage output of 200 V. The system is controlled using TI DSP TMS320F28379D. The parameters of the experiment are shown in Table III. The total output power of the ac-dc converter and dc-dc converter is 2 kW.The ac fundamental frequency is 50 Hz. The switching frequency of the ac-dc converter, f c , is set at 4 kHz. For the proposed suppression method, the carrier signal frequency for the dc-dc converter is set to be f c − 3f 0 , i.e., 3.85 kHz. This frequency is a little lower than that in the case with no optimization. Therefore, this makes the following comparison reasonable.
Compared to the conventional control, the proposed method needs some extra computations, i.e., harmonic estimation from the ac-dc and dc-dc converters (in Figs. 7 and 8) and harmonic suppression control (in Fig. 10). The total computation time of these actions is 11.7 μs. In the experiment, these actions are implemented every 10 ms (dc-link current control loop). Therefore, the computation intensity of the proposed method is not a problem for the system. Fig. 13 shows the DC-bus currents from the ac-dc converter and dc-dc converter (i dc [g] and i dc [b] ). The current flowing into the capacitor i cap and its spectrum are also shown in Fig. 13. In Fig. 13(a), the output power of the ac-dc and dc-dc converters are the same, i.e., P [g] = 1 kW, P [b] = 1 kW. Two converters use the same carrier signal. Then, results with the proposed method are shown in Fig. 13(b). In Fig. 13(b), the power sharing is adjusted between two converters.
With the proposed method, the switching frequency of the dc-dc converter should be adjusted as f c − 3f 0 (3.85 kHz in this case). Thus, the switching cycle of the dc-dc converter is changed from 250 to 259 μs, as shown in the zoom-in views of Fig. 13(a) and (b). From these views, the inductor current of the dc-dc converter is also adjusted from 5.2 to 4.6 A to fully suppress the f c − 3f 0 harmonic on the dc-link. In zoom-in views, the current variations are reflected on the magnitude of pulses on i dc [b] . In Fig. 13(b), i dc [g] and i dc [b] tend to counteract each other, and thus a suppressed f c − 3f 0 harmonic on i cap can be achieved.
Comparing the two results in Fig. 13 and considering the current spectrums on the dc-link, the harmonic in f c − 3f 0 is suppressed from 1.63 to 0.09 A (94.5% reduction). In f c , there is a component with 2.06 A in the conventional case [ Fig. 13(a)], but no component shown when the proposed method is applied [ Fig. 13(b)]. This is because the switching frequency of the dc-dc converter is modified from f c to f c − 3f 0 . It is also interesting to note the change of the second-order harmonics of i cap . There are two components on such a band because of the change in the switching frequency of the dc-dc converter. The dc power generation system suffers dynamic load change in the MEA. For the proposed method, the power sharing ratio should also be adjusted when such a dynamic change happens, as shown in Fig. 14(a). The DC load changes from 2 to 3 kW, and it results in a dc-link voltage drop and recovery. The power sharing ratio changes according to the new working status. The dc-link current reference of the ac-dc converter (i dc [g] * ) changes from 4.5 to 8.0 A and the dc-link current reference of the dc-dc converter (i dc [b] * ) changes from 3.4 to 3.9 A. With the proper power sharing and phase shift angle, a suppression of i cap can be achieved when the output power is 3 kW, as shown in Fig. 14(b). Comparing to Fig. 13(b), the magnitudes of i cap components in f c + 3f 0 , 2f c are increased because of higher output power of the ac-dc converter. However, the f c − 3f 0 harmonic on the dclink is still suppressed to almost zero (0.06 A), which validates the effectiveness of the proposed method under different output power.
Considering the SoC management of the battery, the dc-dc converter may work under buck-mode (charging mode for the battery). In this case, the proposed method can still work effectively, as shown in Fig. 15. The output power of the system is 1 kW. The inductor current of the dc-dc converter is adjusted to −4.8 A in this case. The pulses on i dc [b] * becomes negative, and it counteracts with i dc [g] . Then, the f − 3f 0 harmonic on the dc-link is suppressed to almost zero (0.06 A).

VI. CONCLUSION
This article proposed a dc-link harmonic suppression scheme within a dc power generation system which used a cooperation control between the ac-dc and dc-dc converters. The switching frequency of the dc-dc converter is set according to the fundamental frequency of the ac-dc converter. Then, using a simplified harmonic model and adjusting the power sharing ratio between the ac-dc and dc-dc converters, the targeted harmonic component (in our example case f c − 3f 0 ) has been suppressed significantly. The proposed method was feasible when the battery works under either discharging or charging modes. There was a tradeoff between harmonic suppression and the charging/discharging speed of the battery. The effectiveness of the proposed method was validated by the experimental results. Furthermore, the extra computation burden of the proposed method is very low, and the dc power generation system does not need extra hardware. Thus, the proposed method was convenient to implement and can preserve the simple control.