Stabilization of DC MicroGrid Systems Using the Loop-Cancellation Technique

DC microgrid systems (DCMGs) feed power to constant power loads (CPLs) via transmission lines. Although these systems are commonly used worldwide, CPLs have negative impedance effects. These loads can significantly degrade the system stability. Therefore, stability study is very important to avoid inefficient operations. The model proposed in this article can be derived using a combination of the direct quadrature (DQ) method and the generalized state-space averaging (GSSA) method. This model is suitable for analyzing the system stability using the eigenvalue theorem. For stability analysis, the proposed (DCMGs) will be unstable before reaching the rated power when the irradiance is equal to 0 W/m2. Consequently, the loop-cancellation technique is applied to mitigate the unstable operation until the operation at the rated power can be achieved. Experimental and simulation results were used to confirm the theoretical analysis. The system performed well, and the results proved that the system could be stabilized using the proposed technique.


Stabilization of DC MicroGrid Systems Using the Loop-Cancellation Technique
and flexibility in managing the power flow. Therefore, DCMGs can be used in many applications [4]- [6]. The advantage of DCMGs is their flexibility in power management because each MG can be independently controlled and can supply electrical power to the loads [7]. The literature reviews in [8] and [9] show that one of the DCMG loads is the controlled power converter because this converter is easy to control and maintain. However, the behaviors of loads that are tightly controlled by power electronics can be similar to those of a constant power load (CPL) [10]- [12]; such behaviors can degrade the system stability and lead to system disintegration, and collapse, and noncompliance in power quality [11], [12].
With the increase in the share of CPL in the MG, the system may become unstable even at power levels that are lower than those of the MG-rated power. Therefore, a stability analysis is required at early design stages to ensure safe and stable MG operations.This article investigates the stability conditions for MGs in PV generation stations. It is well known that the power converter models in terms of the differential equations derived from the basic circuit theory are normally time varying because of the switching actions of the switching devices [13]. It is very difficult to use a time-varying model for stability analysis. Therefore, a time-invariant model was used for the stability problems in this article. To derive the time-invariant model, averaging approaches, such as the generalized state-space averaging (GSSA) and direct quadrature (DQ) methods, are normally used. From [14]- [19], the GSSA and DQ methods are suitable to analyze the dc/dc converters and the three-phase power converters, respectively. For the proposed power system, the boost converter is used for tracking the maximum power point (MPP) of the PV array, whereas the three-phase bidirectional voltage source converter (VSC) is used for DCMG power management. Hence, the combination between the GSSA and DQ approaches is presented to derive the time-invariant model of the proposed power system consisting of both dc/dc converters and three-phase power converters. After using the GSSA and DQ methods, the time-invariant model of DCMGs can be achieved, which is suitable for stability analysis using the eigenvalue theorem [20], [21]. The unstable point can then be predicted. However, the stability analysis can only predict the unstable operation in which it cannot mitigate the unstable operation. If this unstable point occurs within the rated power of the system, instability mitigation techniques are required. From the literature reviews, two approaches were used to eliminate the effect of the CPL: passive and active [22]. For the passive method [23], it is a simple technique to increase the system stability by adding the passive components, for example, a resistor, a resistor with capacitor, or a resistor with inductor into the system to increase system damping. The passive technique has a lot of drawbacks such as an increase the system size, weight, and price and system power losses resulting in a decreased system performance.
Therefore, the active method is widely used for the instability mitigation. As for the active method, the control structure is modified without adding the passive components.The virtual damping is created inside the controller loop to stabilize the system [22], [24]. As a result, higher efficiency and reliability can be achieved. Active stabilization can be performed in three ways in which each of them has both benefits and limitations [22]. The first way is the stabilization from the source side [25]. In this way, it can be applied to only the controllable source in which it does not affect to the load performance. The load side stabilization is the second way to mitigate the instability scenario [26]. The load side mitigation can affect to load performance, but it can directly compensate the CPL effect. If the feeder consists of uncontrolled converter and the load performance is very important, the third way should be used. It is located between the feeder and load in which the auxiliary circuits are required [22], [27]. The structure modification by adding an intermediate circuitry will increase cost and losses. Therefore, in this article, the compensated signal from the source side is selected because it does not affect the load performance [27], and other components are not required in the system [27], [28], resulting in modified only controller structure. Moreover, the considered system of DCMGs has the bidirectional VSC which can be easily modified the code inside the controller. From the literature reviews in [29] and [25], the active damping has been used for stabilization in the DCMGs by adding the virtual resistance inside the control loop in which it is the linear feedback active damping method [22]. However, the linearization feedback approach for mitigation can be used to compensate for a limited amount of CPL [28]. Thus, this article investigates the DCMGs under the nonlinear active mitigation technique known as loop-cancellation [27], [28]. To the best of our knowledge, this technique for the DCMGs has not been reported in any previous publications. It is possible to directly eliminate the CPL effect by injecting the compensated signal into the control loop. The simulation and experimental results confirm that the loop-cancellation technique can compensate for the effect of the CPL such that the system provides stable operations within the rated power range. Experimental results have proved that the loop-cancellation technique is an efficient way for improving the performance of DCMGs.
This article consists of six sections. Section I presents the introduction to the research. Section II describes the modeling of the system; the stability analysis technique applied to the proposed DCMGs is explained in Section III. System stabilization using the loop-cancellation technique is addressed in Section IV. The experimental results to confirm the analytical results are presented in Section V, which is followed by the conclusions in Section VI.

II. MODELING OF THE DCMGS FEEDING AN IDEAL CPL
The DCMGs being investigated is shown in Fig. 1; the rated power of the proposed DCMGs was set as 100 kW. This system consists of three parts. In the first part (A), the PV array is the renewable energy source in which the MPP can be tracked using a boost converter [30]. This converter receives power from the PV array and supplies it into the dc bus. In the second part (B), the connection between the DCMG and the main grid ac system via the bidirectional VSC is presented. This VSC is used for DCMG power management, and the dc bus voltage is controlled by VSC using the proportional integral (PI) control with the loop-cancellation technique. The last part (C) is an ideal CPL, which represents the tight control of the power electronic circuits, such as the output voltagecontrolled converter and the speed controlled of the motor drives.
It is known that the CPL can degrade system stability [11], [31], [32]. Many research articles have described the methods for the unstable point prediction using a mathematical model [33]- [35]. However, the power converter model is usually time-varying because of the switching action. Analyzing the system stability via the linear control theory is complicated for this model. Literature review shows that the DQ and the GSSA methods are suitable for modeling the three-phase systems and dc/dc converters, respectively. Hence, the GSSA and DQ methods were used to derive the time-invariant model. In this article, the proposed DCMG models can be derived using a combination of the DQ method and the GSSA approach [34], [36]. The important assumptions used to derive the mathematical model are that the bidirectional VSC have to be operated under the continuous conductance mode (CCM) and the dynamic response of P&O algorithm is very fast. Applying both GSSA and DQ methods to the system in this study will lead to the establishment of a time-invariant model suitable for stability analysis using the eigenvalue theorem [34], [35]. To obtain the mathematical model of the DCMGs, each part of the proposed system was analyzed. As a result, the dynamic model of the proposed system shown in Fig. 1 without the loop-cancellation technique is given in (A-1). However, the model with loop-cancellation approach will be explained in Section IV of this article. To validate the mathematical model (A-1), the exact topological simulation via MATLAB/SimPowerSystem is used. For the model validation, the system parameters are defined as follows: V s = 220 V rms/φ , R eq = 0.1 , L eq = 10 μH, C eq = 2 nF, L F = 5 mH, R LF = 0.1 , C F = 1000 μF, L boost = 5 mH, N p = 40, N s = 9, K pv = 0.2445, K iv = 38.1977, K pi = −0.0067, K ii = −5.2820, E dc = 1500 V, and I rr = 1000 W/m2. The model validation result while the CPL is changed from 80 kW to 95 kW is shown in Fig. 2.
The validation result in Fig. 2 can confirm that the time invariant model derived from the combination between GSSA and DQ methods is correct in which it can be used for the system stability analysis as described in Section III.

III. STABILITY ANALYSIS OF DCMGS
From (A-1), it is clear that the DCMGs without the loop-cancellation technique are governed by a nonlinear system of equations. The first-order term of the Taylor series expansion was used to provide the linearized model suitable for system stability analysis in the linear domain. The linearized model of (A-1) is as follows: The matrices A, B, C, and D are the Jacobean matrices of the DCMGs in the form of the state-space model. Each element of this matrix depends on the system operation point. The system eigenvalues can be calculated as follows [34]: The system is stable if where i = 1, 2, 3, . . . , n (n is the number of the state variable). The stability of the proposed DCMGs with the ideal CPL (shown in Fig. 1) was analyzed. The DCMGs properties were investigated under the following operation conditions. For the first condition, the irradiance was set to 1000 W/m 2 ; the maximum irradiance standard has been reported in [37], and the dc bus voltage was controlled at 1500 V. The remaining parameters are similar as the part of model validation of Fig. 2. The eigenvalues for the first case are shown in Fig. 3(a), where the dominant pole is highlighted in the gray area. The system will become unstable at a CPL equal to 220 kW. The results show that the system is unstable after the rated power. Therefore, the mitigation approach will not be applied to this condition. The time-domain simulation result to confirm the unstable point predicted by eigenvalue analysis is shown in Fig. 3(b). The system becomes unstable when the CPL power reaches 220 kW, as predicted by eigenvalue analysis.
For the second condition, the irradiance was set to 500 W/m 2 , and the dc bus voltage was controlled at 1500 V. The dominant poles for this case are shown in Fig. 4(a); clearly, the system will lose stability if the CPL power reached 155 kW. The simulation result to validate the unstable condition of this case is shown in Fig. 4(b). In this case, the unstable point will occur at a CPL equal to 155 kW. This CPL level is much larger than the rated power. Therefore, no mitigation technique is required for this condition. To evaluate this effect, the details of the effect of the irradiance will be described as follows.

A. Effect of Irradiance Variation
In the previous results, the irradiance was equal to 500 and 1000 W/m 2 ; Figs. 3 and 4 show that these cases are stable within the rated power equal to 100 kW. However, the unstable point is not the same when the irradiance is changed. Therefore, the study on the effect of irradiance changing needs to be described. To evaluate this effect, the eigenvalues are plotted in Fig. 5(a) when the irradiance is changed from 0 to 250 W/m 2 , 500, 750, and 1000 W/m 2 with fixed CPL equal to the rated power of 100 kW. Fig. 5(a) clearly shows that the system will be more stable when the irradiance is increased. To validate the result of Fig. 5(a), a simulation was performed in MATLAB/SimPowerSystem under an irradiance equal to 0 W/m 2 . The dc bus voltage was controlled at 1500 V while the CPL was increased from 85 to 90 kW, 95, and 100 kW at the time instants 2.1, 2.5, and 2.9 s, respectively.
In Fig. 5(b), it can be seen at t = 2.9 s, the system becomes unstable (when CPL is 100 kW). However, the system can recover stability automatically when the irradiance is increased from 0 to 250 W/m 2 at t = 3 s. After t > 3 s, the dc bus voltage was well controlled at 1500 V. This case shows that if the irradiance was more than 0 W/m 2 , the system can be operated in the full power range (0-100 kW) without the requirement to address stability issues. The simulation results in Fig. 5(b) clearly indicate that the irradiance level can affect the system stability, and the system will become more stable without the modification of any strategies into the DCMGs.
For irradiance greater than 0 W/m 2 , the instability of the DCMGs because of the CPL does not occur. Therefore, this article will consider only the case of the irradiance equal to 0 W/m 2 as the worst case scenario because the system can become unstable before reaching the rated power. Moreover, the irradiance cannot be controlled if the system becomes unstable naturally. For example, the irradiance value was almost equal to 0 W/m 2 when the DCMGs are operated at night or on cloudy days. To predict the system stability in the worst case scenario, the dominant poles for the CPL were increased from 80 to 100 kW, and the dc bus voltage was regulated at 1500 V [see Fig. 6(a)]. The simulation result of the worst case scenario is shown in Fig. 6(b). Fig. 6 shows that the system will be unstable before reaching the rated power. This situation may damage the power electronic devices because of the huge oscillation at the dc bus. Focusing on this scenario helps mitigate the unstable operations until the rated power is achieved. Therefore, the stabilization technique to maintain the system always remains stable; this technique will be presented in the Section IV for the worst case scenario.

IV. STABILIZATION OF THE DCMGS FEEDING AN IDEAL CPL
The stability analysis from the previous section shows that the unstable operations do not occur within the rated power if I rr > 0 W/m 2 . Therefore, the DCMGs stabilization using the loop-cancellation technique is only described for the worst case scenario (I rr = 0 W/m 2 ).This technique is called loopcancellation [27], [28] because the compensated signal can directly reduce the effect of P CPL . The advantage of this technique is that it does not require additional components. The loop-cancellation technique involves the modification ofthe PI controllers of VSC [38] to mitigate the CPL effect. The DCMGs with the loop-cancellation technique can feed the CPL until the rated power is achieved, as shown in Fig. 1. However, the system components are similar to the system used in Section III, except for the controller of VSC. The PI controllers were used with loop-cancellation for system stabilization. The details of loop cancellation in Fig. 1 can be found in the gray area of Fig. 7.
The block diagram in Fig. 7 is the control loop diagram of the VSC with the proposed mitigation approach. The CPL behaves as a negative impedance [22] in which I CPL = P CPL /E dc .The CPL effect needs to be eliminated by detecting the output voltage at the dc bus (E dc ). The E dc is then reversed with a low-pass filter to reduce the noise caused by the high-frequency switching device. The signal from the low-pass filter denoted by E dc,comp can be calculated by (4)  where ω c is the cutoff frequency (rad/s), and E dc is the dc bus voltage(V).
The ω c is designed to be equal to the resonance frequency [28] in which ω c is equal to 150 rad/s in this article. From (4), the E dc,comp is opposite from E dc . To consider only the oscillation during the transient, E dc,comp is then passed through the derivative resulting in the slope of the compensation value (Ė dc,comp ) as calculated in (5). After the derivative block, in steady state condition, theĖ dc,comp will be equal to 0 because of the derivative of constant. Therefore, the loop-cancellation technique will affect to only the transient response. The oscillation ofĖ dc,comp is opposite to the oscillation of E dc,comp . This oscillation is scaled by multiplied by K FB and E * dc /2 as calculated in (6) in which the E dc,comp. is the compensation voltage value to create sufficient magnitude of compensating signal. The compensating signal E dc,comp. having the opposite oscillation of E dc will be injected into the summation block with positive sign. As a result, the oscillation of E dc during the unstable operation can be eliminated by However, the magnitude of compensated signal E dc,comp must be designed to achieve the appropriate value of compensating signal. The magnitude of E dc,comp depends on the gain of K FB . This gain will be adjusted until the effect of P CPL can be eliminated. It can be seen from Fig. 7 that after the loop cancellation is applied, the control loop of VSC is modified, as shown in the gray section of Fig. 7, by coding only in the microcontroller board. However, from Fig. 7 and (6), it is possible to calculate M * d and M * q with loop-cancellation as follows: Using the mathematical model of the DCMGs derived using the DQ and GSSA methods (described in [39]), the M d and M q of (A-1) [39] can be replaced by the M * d and M * q values from (7). The dynamic model of DCMGs with the loop-cancellation technique can be expressed as in (A-2). To validate the model of (A-2), the intensive time-domain simulations of MATLAB using the same parameters of Section II with K FB = 2 were used. The CPL was changed from 110 to 120 kW at t = 0.3 s. The result is given in Fig. 8. It can be seen that the proposed model of (A-2) can provide the correct responses for both transient and steady-state. Therefore, the derived model of (A-2) can be used to assess the K FB for eliminating the CPL effect. From (A-2), it is clear that the model is nonlinear. Performing the Taylor's series expansion and addressing only firstorder terms, the linearized model of the DCMGs including the loop-cancellation technique can be derived. As mentioned above, the stabilization technique in this study will address only the worst case for the DCMGs (I rr = 0 W/m 2 ) because, for all I rr > 0 W/m 2 , the unstable operation does not occur for all the power values below the rated ones for the DCMGs For mitigation purpose, the K FB is adjusted until it is enough for eliminating the CPL effect. The appropriate K FB can be determined by the eigenvalue theorem with the linearized model of (A-2). The scenario is set as follows: the dc bus voltage was controlled at 1500 V, and the irradiance was set to 0 W/m 2 for the worst case scenario. An appropriate K FB needed to be found. Fig. 9(a) shows the dominant poles located at the right-hand side of the s-plane when the CPL is equal to 100 kW. These poles indicate that the DCMGs are unstable operation for the worst case scenario. However, if K FB = 1 (i.e., the proposed mitigation is applied), the system will become stable, and the dominant poles move back to the left-hand side of the s-plane. To confirm this analytical result, time-domain simulations in MATLAB/SimPowerSystem environment were performed; the results are reported in Fig. 9(b).
In Fig. 9(b), we can clearly see that the DCMGs with K FB = 0 is unstable at t = 3 s whereas P CPL = 100 kW. However, at t > 3 s, the DCMGs can have stable operations by setting K FB = 1. Hence, the appropriated value of K FB should be investigated to ensure that the system will always be stable.

A. Design of the Appropriated K FB Value
The system controller can be designed based on the desired natural frequency. The effect of the natural frequency [8] on the stability margin should be investigated because the system might go into unstable operations. In this article, the bandwidth of the voltage loop natural frequency is considered within the range 150 rad/s ≤ ω nv ≤ 250 rad/s. The instability line calculated from the proposed mathematical model without the instability mitigation (K FB = 0) is shown in Fig. 10(a) for this natural frequency range. From Fig. 10(a),we can see that the system becomes unstable within the rated power range (<100 kW), that is, when the CPL is greater than 98, 87, and 79 kW for the PI controller bandwidth equal to 150, 200, and 250 rad/s, respectively. Fig. 10(b) shows the simulation results that confirm the analytical result of Fig. 10(a). Analysis of the stability conditions depending on the voltage control natural frequency leads to the conclusion that a mitigation technique is required if the system cannot maintain stability in the specified power range. The design of the appropriate K FB is illustrated in Fig. 11(a). The instability line in Fig. 11(a) when K FB = 3 is located above the rated power for all the considered bandwidths. Hence, K FB = 3 can be used to mitigate the system for this case. Fig. 11(b) shows the simulation result of the DCMGs using K FB = 3; stable operations are maintained for all the possible voltage control natural frequencies and load powers within the rated range.

B. Evaluation of the Appropriated K FB Value Using the Hardware in the Loop
The hardware-in-loop (HIL) simulation was used to ensure that the DCMGs including the proposed loop-cancellation technique can be implemented in the microcontroller board programming. In this article, the TMDSCOCK28335 board was used for the HIL simulation. The connection between the microcontroller board and MATLAB is shown in Fig. 12(a). The condition of the HIL simulation is operated as the exact topological simulation shown in Fig. 11(b). The HIL simulation results are depicted in Fig. 12(b); the sampling time of this simulation was set to 30 μs.
Figs. 11(b) and 12(b) show the results of the exact topological and HIL simulations; the dc bus voltage response is stable when the CPL is set at the rated power of DCMGs if the loop-cancellation technique with K FB = 3 is applied. To consider the response for stable operations, the exact topological and HIL simulation results when the CPL is increased from 70 to 75 kW at t = 0.9 s with K FB = 3 are addressed in Fig. 13.
From Fig. 13, the dc bus voltage is well regulated to 1500 V. Hence, the loop-cancellation technique with K FB = 3 can be applied in normal operations. Fortunately, the transient response under the loop-cancellation technique can be improved as confirmed by the results shown in Fig. 13. Therefore, the proposed mitigation technique can always be activated in the system to ensure that it is stable under the normal operation scenario. However, the method to determine the K FB value needs to be reconsidered if the system parameters are changed because these parameters can significantly stabilize the system. The experimental validation from the testing rig is presented in Section V.

V. EXPERIMENT RESULTS
In Section IV, the mitigation technique based on the loop-cancellation method has been proposed to avoid unstable operations of the DCMGs. The proposed solution can be applied in all modes; however, this solution is essential in the worst case scenario where the system operates at no irradiance (0 W/m 2 ). The analytical studies in Section IV have shown that system stabilization can be achieved. In this section, experimental proof is provided for the proposed solution. The testing rig of the system used in the study is shown in the parts of B and C from Fig. 1. It consists of the bidirectional VSC located between the dc bus and three-phase power system, and the CPL is represented with the controlled buck-boost converter. For the buck-boost converter, the adaptive Tabu search [36] was used to design the PI controller for achieving  the optimal output response, which was as close as possible to the ideal CPL. The details of the testing rig are provided in Fig. 14.
The rated power of the test-bench system was scaled down to 100 W for the experiments. The dc bus voltage was controlled to 100 V, and the resistive load of the buck-boost converter was 40 . The output voltage of the buck-boost converter was tightly regulated by the PI controller; therefore, the output power of this converter can be calculated as P out = V 2 o,buckboost /R Load [40] in which the P out will be equal to P CPL .  The stability analysis has been conducted for varied control bandwidth, and theoretically expected stability borderline is shown in Fig. 15(a) with the symbol 'x'. It can be seen that the trend of unstable points from testing rig as shown in the red circles in Fig. 15(a) is similar to the instability line predicted theoretically. The experimental results for controller band-widths 150, 200, and 250 rad/s are shown in Fig. 15(b)-(d), respectively.
In experimental results [ Fig. 15(b)-(d)], the CH1 line is the response of the dc bus voltage. The output voltage and current of the buck-boost converter are represented in CH2 and CH3, respectively. In Fig. 15(b), the system with the controller bandwidth equal to 150 rad/s becomes unstable at V O,buckcoost = 57 V; P out was calculated to be 81.23 W. In addition, the testing results shown in Fig. 15(c) and (d) for the controller bandwidths 200 and 250 rad/s show that unstable operations occur at V O,buckcoost = 54 V (72.9 W) and V O,buckcoost = 51 V (65.03 W). Clearly, the higher bandwidth is less stable. The system becomes unstable before the rated power (100 W) is achieved for all bandwidths; therefore, mitigation is certainly required. Applying the proposed loop-cancellation technique (as discussed in Section IV) is required. The instability lines are then calculated (as proposed above) by varying K FB , as shown in Fig. 16(a). The results show that when K FB is set equal to 3, the system is always stable for ω nv = 150 − 250 rad/s. The experimental results of the mitigated system with K FB = 3 for the controller bandwidths equal to 150, 200, and 250 rad/s are depicted in Fig. 16(b)-(d), respectively. From Fig.16(b)-(d), the experimental testing with loop cancellation (K FB = 3) can operate until the rated power (100 W). These results confirm that the stability margins of DCMG systems can be significantly expanded by applying the proposed loop-cancellation technique. As a result, from the HIL simulation and experiment, the DCMGs are always stable within the rated power range. Modifying only the control loop (i.e., the control code) of the bidirectional VSC can make the system more stable without introducing any hardware changes to the system.

VI. CONCLUSION
This article presents the stabilization of DCMGs feeding the CPL using the loop-cancellation technique. It was shown that the unstable point depends on the CPL level. In addition, the irradiance of PV arrays also affects the stability margin. The stability study shows that the system will be unstable before the rated power when the irradiance is equal to 0 W/m 2 . Therefore, the instability mitigation approach using the loop-cancellation technique was applied to keep the system stable until the rated power was achieved. The loop-cancellation technique can directly eliminate the CPL effect. Moreover, this technique does not require other passive components. The results show that using this technique, the proposed DCMGs could supply the CPL as long as the rated power for all the cases of the controller bandwidth varied. When the proposed mitigation technique was used, the system performance could be improved for both the transient and steady-state responses. Good agreement was reached among the theoretical results, HIL simulation, and the experimental results APPENDIX The mathematical model without loop cancellation technique derived from the combination between DQ and GSSA methods is shown in (A-1), as shown at the bottom of the page. However, the model considering the loop-cancellation    technique to mitigation the unstable operation can be given in (A-2), as shown at the top of the page.