Asymmetrical Triangular Current Mode (ATCM) for Bidirectional High Step Ratio Modular Multilevel Dc–Dc Converter

Direct current (Dc) networks have proven advantages in high voltage direct current (HVDC) transmission systems, and now they are expanding to medium- and low-voltage distribution networks. One of the major challenges is to develop reliable dc–dc voltage transformation achieving high efficiency and performance, especially at high voltage and high step ratio. New resonant modular multilevel topologies have arisen as an alternative, mainly because of advantages such as optional use of transformers, natural voltage balance, simple control, and soft-switching capability. However, this type of operation generates a high peak current, does not allow control of power flow in all power range, and has a limited range of voltage variation. This article proposes an asymmetrical triangular current mode applied to high step ratio modular multilevel dc–dc converters. The proposed modulation increases the efficiency and achieves bidirectional control of the power, soft-switching, and a natural balance of the voltage in the cell capacitors. The experimental results show the bidirectional operation and the capacitor voltage balance of the converter under different operating conditions with higher efficiency (97.72%) and lower peak current compared to previous reports of this topology using resonant operation.

Asymmetrical Triangular Current Mode (ATCM) for Bidirectional High Step Ratio Modular Multilevel Dc-Dc Converter such as lower power losses, less and smaller cables, and absence of reactive power nor peak voltages. However, these advantages have not been enough for the massive implementation of dc power systems due to the lack of competitive dc technology, especially high voltage dc-dc converters. The exception is the mature current source converter for high voltage direct current (HVDC) systems, which has demonstrated to be an economically and technically attractive option, mostly in specific point-to-point transmission systems such as offshore wind farms and long transmission lines [1]. Nowadays, the voltage source converter (VSC) in HVDC systems has arisen with the use of the modular multilevel converter (MMC) [2], because it introduces the capability to compensate reactive power, ac voltage control, black-start functionality, and multiterminal connection allowing large meshed and radial HVDC networks [3], [4]. On the other hand, the development of medium-and low-voltage direct current (MVDC-LVDC) networks is also of great interest due to the increase in dc loads and dc generation sources such as photovoltaic solar panels, electric vehicles, and battery energy storage systems. In this scenario, the dc-dc conversion that allows the interconnection of HVDC, MVDC, and LVDC systems is a key element for the development of the networks of the future. A dc-dc converter for HV and MV range should provide high efficiency, bidirectional power flow, voltage regulation, and fault blocking capability [5], [6]. Several dc-dc converter topologies have been proposed, but there are two converter technologies that stand out for their high reliability, modularity, and flexibility: the input-series output-parallel converters, based on dc-dc building blocks [7]- [12]; and the modular multilevel front-to-front (MMC-FTF) converters [13]- [19].
The MMC-FTF uses two MMCs connected through a transformer and operates at a medium frequency to reduce the size of the transformer and the passive elements of the converter [14]. This solution provides full bidirectional power flow control and galvanic isolation, but it requires a complex voltage control and hard-switching operation that reduce efficiency, especially in high step ratio voltage transformation.
To solve this problem, resonant MMC topologies have been proposed for high step voltage ratio [20]- [23], adding softswitching operation to decrease the power losses. These proposals used a resonant tank formed by the capacitors of the cells, which is excited by a square wave voltage at the resonant frequency, achieving zero-current-switching (ZCS) in the semiconductor devices. The voltage gain can be controlled changing the number of cells used in the stack modulation [21], [22], but it is more suitable for reconfiguration or for a degraded operation rather than for accurate voltage control due to its step behavior. Thus, control through the variation of the operating frequency has been the most employed technique [20], [24], allowing precise control of transferred power. However, operation at a frequency different than the resonant frequency is more complex to model and the ZCS is lost, limiting the power range in which the converter is highly efficient. Also, the resonant operation is highly sensitive to the parameters of the resonant tank, requires a design that carefully considers parasitic elements, and generates high peak current in the ac link. This high peak current causes high conduction losses and low efficiency despite its soft-switching capability.
Alternatively, triangular current mode (TCM) scheme applied to dual active bridge (DAB) dc-dc converters [25], [26] achieves bidirectional control of the power maintaining ZCS operation without resonance. Therefore, the design process and control scheme are simpler than resonant operation, extending highefficiency operation to full power range. Also, the bidirectional operation using TCM has a symmetrical gain in both directions of the power flow. In the resonant case, it needs a symmetric resonant tank as PI type or T type LCL/CLC resonant tank to get a symmetric gain [27], [28]. However, TCM has not been applied in MMC topologies because it is not compatible in a single-pole configuration.
This article presents a new asymmetrical TCM (ATCM) for high step ratio dc-dc MMC, which achieves bidirectional power flow through a simple control law, maintains ZCS operation, reduces the peak current compared to resonant mode, and presents natural balance of the voltage in the cell capacitors without the need of complex control strategies [29]. The high step ratio dc-dc MMC topology is presented in Section II, the proposed modulation of the converter is described in Section III, and the dynamic balance of power is analyzed in Section IV. Finally, the simulation and experimental results are shown in Section V.

II. HIGH STEP RATIO MODULAR MULTILEVEL DC-DC CONVERTER
The topology of the high step ratio dc-dc MMC is shown in Fig. 1. The high-voltage port contains a stack of N half-bridge cells connected through an inductor to an active full-bridge converter, enabling the bidirectional control power flow between the high-voltage side (V HV ) and the low-voltage side (V LV ). A transformer could be optionally used between the inductor and the full bridge to provide galvanic isolation and a higher step ratio. Additionally, filters are connected in high-voltage and low-voltage sides to decrease voltage and peak current, but they are not considered in the analysis for simplicity.
The dynamic equations that describe the general operation of the converter consider the voltages at both side of the inductor v L1 and v L2 as is shown in (1) and (2). The voltage v L1 is the difference between the voltage V HV and the voltage in the half-bridge stack v stack . The voltage v stack is the sum of all voltages in the half-bridge cells v i , therefore it can be On the other hand, the voltage v L2 is determined by the full-bridge commutation state S FB ∈ {1, 0, −1} and the low voltage V LV (v L2 = V LV · S FB ). The inductor current i L , the commutation state S i-HB , and the capacitance C i of each cell capacitor defines the capacitor voltage waveform v ci in each half-bridge cell (2), determining their ripple, mean value, and dynamic behavior. The resistance r eq represents the total conduction loss resistance in the converter generated by the inductor, switches, capacitors, and wire (1) The inductor current i L is controlled through the modulation of the voltages v L1 and v L2 , and the direction and magnitude of power are controlled directly with the inductor current.

III. PROPOSED MODULATION TECHNIQUE
The TCM requires a coordinated three-level voltage in both terminals of the inductor, v L1 and v L2 . The full-bridge generates three levels in v L2 by using unipolar modulation, but the stack requires a special modulation to get three levels in v L1 . Section III-A presents the proposed stack modulation. Then, Section III-B presents the TCM proposal.

A. Half-Bridges Stack Modulation
The proposed modulation in the stack is aimed to generate a three-level voltage v L1 controlled by transitions times t 1 , t 3 , t 4 , and t 6 as is shown in Fig. 2, extending the modulation presented in [23] to an asymmetric operation. In order to achieve this, the cells are modulated with the same waveform using a phase shift of T S to reduce the resultant switching-frequency and to achieve a balanced use of the cells. The commutation state of the first half-bridge cell S j 1 is considered as a periodical signal of period N · T s defined by transition times and a free parameter j as is shown in (3). j is a free parameter that defines a set of different cell waveforms in the half-bridge cell that cause the same voltage in the stack if j ∈ N | (0 ≤ j < N − 1) Therefore, a time-controlled voltage v stack of three levels centered on (N − 1)V C , amplitude V C , and period T s is generated in the stack if the voltage in the cells are phase shifted by T s and all the capacitor voltages in the cells are balanced and equal to V C , as is determined below Finally, a voltage v L1 of three levels centered on zero, amplitude V C , period T s and controlled by transition times t 1 , t 3 , t 4 , and t 6 is obtained if the relation (5) is achieved, as is shown The proposed modulation waveforms for each cell is illustrated in Fig. 2, taking N = 5 and j = 2 as an example. The successful operation relies on all cells being healthy. However, in case of failure, it is possible to bypass the faulty cell and adjust the V C to the new number of cells.

B. Asymmetrical Triangular Current Mode
Considering the stack modulation previously presented and neglecting the equivalent resistance r eq , the dynamic equation (1) can be simplified to (7). This model is equivalent to a DAB linked by an inductor, allowing the use of the TCM [25]. TCM controls the power flow through the transition times of the voltages on both sides of the inductor. Therefore, the slope of the inductor current i L is defined by the inductance L and its voltage, which is imposed by the difference between the voltages controlled by the stack v L1 and the full-bridge v L2 (7). The main advantages of the TCM are that it operates with soft-switching in most semiconductor transitions, and it can limit the peak current Conventional TCM generates a symmetric current in the inductor, which is desired for DAB converters, but it is a problem for the proposed topology. A symmetric current would generate zero power flow from the high-voltage side because the stack is connected in series with the high-voltage dc-link. To solve this problem, an ATCM scheme is proposed to achieve bidirectional control of the power and to maintain the ZCS. The proposed ATCM scheme is illustrated in Fig. 3. During the intervals (0, t 1 ), (t 3 , t 4 ), and (t 6 , T s ), the voltages v L1 and v L2 are zero to keep the current i L constant and equal to zero. In t 1 , a cell in the stack is bypassed generating V C voltage in v L1 while the full bridge is kept in zero state [see Fig. 3(a)].
The voltage V C is, therefore, applied to the inductor, causing the current i L to increase linearly. In t 2 , the full-bridge imposes the low-voltage (V LV ) in v L2 , so the inductor voltage is defined by the difference of the voltages applied by both converters (V C − V LV ). Therefore, the low-voltage V LV must be greater than V C in order to obtain a negative slope of the inductor current and get ZCS at t 3 . When the current reaches zero in t 3 , an additional cell module is connected generating zero voltage in v L1 and the full bridge is switched applying zero voltage in v L2 . Thus, the equations for current i L in a positive power flow are shown below .
ZCS restrictions are determined in (9) considering duty cycles D i (0 < D i ≤ 0.5) as in Fig. 3(a), the conditions for continuity of the current i L for t 2 and t 5 times, and imposing that the current reach zero in t 3 and t 6 times in (8) Therefore, peak currents in the inductor i p1 L and i p2 L can be found in (10), using ZCS restrictions (9) and noticing that these occur in the t 2 and t 5 times IV. DYNAMIC BALANCE OF POWER The previous analysis requires that the mean voltage in the capacitors of the cells maintains a constant value during their operation. This section presents the voltage balance condition in the converter and a simple model to control the power transfer between ports maintaining this balance.

A. Voltage in the Cell Capacitors
Considering the ATCM and the proposed modulation, the voltage in each capacitor cell can be found integrating (2). The capacitor voltage at the end of the modulation time window N · T s can be expressed using the peak currents as is shown below In order to achieve a steady-state balance in the voltage capacitors, this voltage must remain in the same value at the end of the modulation time window. Therefore, the steady-state voltage balance condition can be found below The ratio D 3 D 1 represents the level of asymmetry of the current in the inductor. Also, the asymmetry needed to keep the steadystate capacitors voltage balance decreases as the number of cells used increases.
The peak to peak voltage in the capacitors v pp ci in steady state depend of their capacitance, peak currents, and number of cells. Therefore, a capacitance value to keep the voltage ripple within a certain boundary can be obtained from (13) using the worse

B. Power Transfer
In order to calculate the power transferred between the highvoltage port, the low-voltage port, and the interchange of power among the cells, the average inductor currents in the first (i 1 L ) and second (i 2 L ) half cycles of the switching cycle are defined in (14) and illustrated in Fig. 3(a). These average currents can be defined as a function of the peak currents in the inductor i p1 L and i p2 L using the proposed ATCM, however, this analysis will consider a generalized inductor current waveform at this point The average power delivered by the high-voltage port in one switching cycle P HV is defined by the sum of the average currents i 1 L and i 2 L due to the inductor current waveform is the same as in the high voltage port if filters are not considered. On the other hand, the average power in the inductor P LV is defined by its difference as is described in (15). The same capacitor voltage balance condition in the cell stack (12) is found through these equations considering ATCM and neglecting the power losses (P HV = P LV ). This extends the voltage capacitor balance analysis to other modulations in the stack such as sorting modulation Alternatively, (15) can be expressed as a function of the average power for the stack P stack in (16), because it is the difference of these two average power (P stack (k) = P HV − P LV ) if the cell power losses are neglected Thus, using (15) or (16), it is possible to control the power transfer between high-voltage and low-voltage ports through the average currents i 1 L and i 2 L . The control law for the power flow P HV is determined in (17), considering the ATCM lossless model in steady state. D 1 is able to control the power transfer and the maximum power P max HV is obtained evaluating P HV at D 1 = 0.5. A similar analysis can be performed for negative power flow inverting the phase shift of voltages v L1 and v L2 as is illustrated in Fig. 3(b). Therefore, these relationships allow full bidirectional control of the power flow while maintaining the ZCS and voltage balance in the converter The resistive elements in the inductor (r l ), switches (r sw ), and capacitors (r c ) reduce the maximum power transfer due conduction losses and voltages drop at both sides of inductor. This voltage drop can be incorporated in the analysis of power transfer, considering the equivalent resistance r eq as the sum of all resistance elements in the converter, as is shown in (18). Two switches in the full-bridge and N cell switches in the stack are conducting in any commutation state. Also, the number of capacitors connected can be approximated by a mean value of (N − 1) since the number of capacitors inserted using the proposed modulation is alternating between (N − 2), (N − 1) Therefore, the power transfer considering voltage drop due resistive elements P r HV can be found solving The main benefit of ATCM over the alternative resonant operation is a simpler model that works across the entire power range without losing ZCS. The resonant operation requires modifying the operating frequency to control the power transferred between the ports, making the model more complex and losing the ZCS at operating frequencies other than the resonant frequency. Alternatively, the ATCM model is valid in the entire power range with ZCS, making the converter highly efficient in any operation point. Also, the design process is easier and less restrictive due to the fixed frequency operation and the absence of the resonant tank highly dependent of parasitic elements or variations of cell capacitance.
The maximum peak current and stack voltage ratio ( v pp

L1
V HV ) are compared in Table I, showing a significant reduction in the maximum peak current for equivalent high voltage port and cells rate. However, ATCM generates less stack voltage ratio than the resonant operation because ATCM operates with three-levels voltage in the ac link instead of a two-level voltage. Therefore, the resonant operation achieves a higher voltage ratio at the same number of cells, meanwhile ATCM operates with better use of the dc current component.

V. RESULTS
This section presents two sets of results, the simulation in a 1-MW full-scale converter, and the experimental results in a scale-down prototype.

A. Real-Scale Simulation
The parameters of the full-scale proposed converter are listed in Table II. Different capacitance values are considered for each capacitor in the cells to evaluate the natural balance under more realistic conditions. Fig. 4(a) shows the operation of the converter at 25% of the maximum power with the low-voltage side as load, illustrating  the voltages and current of the inductor in four switching periods. Fig. 4(b) illustrates the step response of the converter for maximum power reversal in the same time window.
The voltages of each cell capacitor in the modulation time window are shown in Fig. 4(c), verifying the correct power balance of the converter and cells even with different capacitance values for the capacitors of each cell. The ripple voltage in the capacitors is limited to 0.5% as it was designed.
Voltage and cell current for one cell are shown in Fig. 4(d), verifying the ZCS in this side of the converter. The voltage v c1 and v 1 represents the voltage of the capacitor and the output voltage of the cell one, respectively. Thus, the charge and discharge process of the capacitor v c1 can be observed in Fig. 4(c) and (d). Also, the ratio N −2 N used in balance condition (12) can be deducted from Fig. 4(d) as the number of cycles of positive current over negative current in the cell while it is connected The overall simulated efficiency is over 98.25% in all power ranges, as is shown in Fig. 5. The following power losses were taken into account: 1) IGBT conduction losses; 2) IGBT turn-on and turn-off switching losses; 3) diode reverse recovery losses;  and 4) diode conduction losses. The power losses in the cells stack at full power represents 76.5% of total losses and are composed only by conduction losses due to the ZCS operation (see Fig. 6). The power losses in the low-voltage full-bridge at full power represent the other 23.5% of total losses and are distributed more evenly between conduction (59.6%) and switching losses (40.4%). The IGBTs switching losses in the full bridge are generated by the only two hard-switching transitions at times t 2 and t 5 , meanwhile the IGBT conduction losses are negligible because they are only conducting for the short periods (t 1 , t 2 ) and (t 4 , t 5 ) when the power flow is from high voltage to low voltage port [see Fig. 3(a)]. Thus, the full-bridge diodes are conducting most of the time, and their switching losses are almost zero because the transitions are made with ZCS at t 3 and t 6 times. The peak current is 2.27 times the average current at full power, and it increases as the power transfer decreases (see Fig. 5). Both efficiency and peak current achieve better results with ATCM than those previously presented using a resonant operation for a similarly designed converter [20].

B. Experimental Scale-Down Prototype
The scale-down prototype (see Fig. 7) was designed for 1.3 kW of maximum power transfer between a high-voltage side of 950 V and a low-voltage side of 260 V. The high voltage port was generated by a bidirectional dc power supply and the low voltage port by a unidirectional dc power supply, therefore the steady-state experiments consider a power flow from low-to high-voltage sides due the unidirectional power supply limitation. Predesigned cells were used in the stack, so the device technology (MOSFET) and the sizing are not optimal. IGBTs are a better option at this operating frequency because their lower conduction losses take advantage of the ZCS operation. However, the prototype works correctly to validate the theoretical analysis. The inductor was built using a ferrite core, and it was designed to avoid saturation in the core for a maximum peak current of 13 A. The detailed parameters of the prototype   Table III. An OPAL-RT OP4510/4520 was used as the control platform and to generate the switching signals.
To validate the model, the converter was tested in the full range of power transfer. The experimental results validate the control of the power transfer through the duty cycle D 1 fitting well to the theoretical model considering the conduction losses from (19) as is shown in Fig. 8. The steady-state waveforms of voltages and current in the inductor at 25% of power transfer from low-to high-voltage ports show a behavior concordant with the previous theoretical analysis and simulations, as is illustrated in Fig. 10(a). The step response of the converter, from 210 W low-to high-side power transfers to 125 W high-to low-sides power [see Fig. 10(b)], demonstrates the fast response and the bidirectional capacity of the converter. However, the reference step should occur at the end of the switching time to avoid undesired transients in the inductor current, generating a delayed response by T s at worst case.
The charge and discharge process of the cell capacitors can be observed in Fig. 10(c), validating the voltage balance in the  capacitors using the proposed operation. The ripple voltage in the capacitors is 1.6% at this operation point validating the design equation (13).
Voltage and current of one cell in the modulation time window are shown in Fig. 10(d), verifying the soft-switching in the stack using the ATCM. The ratio of N −2 N used in power balance condition is confirmed in this figure in the same way that was explained in the simulation section. Detailed experimental waveforms at full power (D 1 = 1 2 ) are illustrated in Fig. 11(a), showing the voltages and current in the inductor, the current and voltage of one cell, and all capacitor cell voltages. The same waveforms at 50% of maximum power (D 1 = 1 8 ) are shown in Fig. 11(b), allowing the comparison between these two points of operation. In both cases, the experimental results validate the previous analysis for waveforms in the inductor, ZCS in half-bridge cells, capacitor voltage ripple, and power balance.
The maximum efficiency of the prototype was 97.72% at 77% of maximum power transfer, and it remains over 97% in the 40-100% power transfer range as is shown in Fig. 9. At lower power transfer levels, the experimental efficiency decreases to a minimum of 92% because the losses independent of the power, such as those of the embedded measuring sensors, are increasingly relevant at lower power transfer levels. The experimental peak current is 1.98 times the average current at full power, and it increases as the power transfer decreases (gray line in Fig. 9) drawing a curve similar to the simulated in Fig. 5.

VI. CONCLUSION
An ATCM for a dc-dc MMC has been successfully validated, achieving bidirectional power control, ZCS, and balance of the voltage in capacitor cells. A simple control law is proposed to control the converter. Theoretical analysis has been verified with full-scale simulations and a scaled-down prototype, showing higher efficiency (97.72%) and lower peak current compared to previous reports of this topology using resonant operation. The experimental results confirm the operation principle, the voltage balance in the cells, and the operation at a high number of cells and voltages. As a disadvantage, the asymmetric operation in a dc-dc MMC with a low number of cells could saturate the core of the transformer if it is used for galvanic isolation. However, the asymmetry is reduced for high step ratio due to the need for a larger number of cells. With these results, the converter using ATCM has the potential to be a good solution for high step ratio dc-dc conversion.