Zero-Current Switching (ZCS) for a High Step Ratio Modular Multilevel dc-dc Converter with wide voltage range operation

The rise of new dc technologies is pushing the development of highly efficient dc-dc converters, especially at high voltage and high step ratio. Modular multilevel converters (MMCs) are an attractive alternative because they can manage medium and high dc voltages with standard semiconductor devices with high efficiency if they employ soft-switching techniques. However, the latest soft-switching techniques have been proposed for fixed voltage range, limiting their operation. This paper proposes a soft-switching modulation for the high step ratio Modular Multilevel dc-dc Converter in extended voltage range. The proposal achieves zero-current switching and regulates the voltage balance among the floating cell capacitors, while using a simple control scheme to regulate the output voltage. The theoretical analysis has been verified with full-scale simulations, demonstrating excellent dynamic response and reduced rms current.


I. INTRODUCTION
The latest developments in power electronics have allowed the rise of new technologies and the resurgence of dc power systems, due to their increased use in HVDC transmission systems [1], photovoltaic solar power [2], offshore wind farms [3], battery energy storage systems [4], data centers [5], electric vehicles [6] and fast chargers [7]. In this scenario, the dc-dc converters are the enabling technology for the development of the new electrical infrastructure and the establishment of dc grids.
For high power, the front-to-front Modular Multilevel Converter (MMC) [8] stands out for its modularity and flexibility. This solution provides bidirectional operation thanks to the two MMCs and galvanic isolation due to the mediumfrequency transformer at the ac-link. However, the hardswitching operation dramatically increases the power losses. For this, resonant topologies [9] has been proposed for high step voltage ratio. These topologies are composed of a resonant tank, which is excited by a square wave voltage at the resonant frequency to achieve soft-switching. Thus, control through the variation of the operating frequency allows to control the transferred power, but it limits soft-switching range, and consequently a high-efficient operation.
Alternatively to the resonant operation, trapezoidal/triangular current modulations (TCM) approaches are presented in [10], [11]. TCM achieves the balance of the voltages among cell capacitors and maintains the softswitching without resonance. However, the proposed works assume fixed voltages at input and output ports, limiting the analysis to a specific operation point.
This paper proposes a zero-current switching (ZCS) modulation for the high step ratio Modular Multilevel dc-dc Converter, extending TCM to a variable output voltage operation and a flexible stack modulation. The proposed modulation method achieves ZCS and maintains the voltage balance among the cell capacitors over a wide voltage range. The proposal has been verified with full-scale simulations.

II. HIGH STEP RATIO MODULAR MULTILEVEL DC-DC CONVERTER
The topology of the high step ratio dc-dc MMC is formed by a stack of N half-bridge cells which support the high-voltage port V HV , while an active full-bridge converter connects the low-voltage port V LV , as is shown in Fig. 1. Both subsystems are connected through an inductor L generating an ac lowvoltage link. The converter achieves high-step voltage ratio without the need for a transformer; however it could be added to provide galvanic isolation and additional voltage gain. Furthermore, filters are placed at both sides to decrease voltage and currents ripple, but these are not considered in the following work due to their null impact in the modulation analysis. The current through the inductor is controlled by the voltages v L1 and v L2 following (1). The voltage v L1 is the difference between the high-voltage V HV and the total voltage in the stack v stack , given by the sum of the half-bridges output voltages v i . Thus, v stack is controlled by the switching states of each cell S i-HB ∈ {1, 0}. On the other hand, v L2 is determined by the full-bridge switching state and the lowvoltage V LV . The inductor current i L , the commutation state S i-HB and the capacitance C i of each cell capacitor defines the capacitor voltage waveform v ci in each half-bridge cell (2), determining their ripple, mean value and dynamic behaviour.
If it is assumed that the cells have the same capacitance C, their capacitors are controlled to the desired value V * C and neglecting internal losses, the relationship between the capacitor voltages and the total stack power P stack yields to Therefore, the current across the inductance L is controlled by the difference of the voltages v L1 and v L2 at each side of it in order to control the power flow between both ports. Finally, the direction and magnitude of power is controlled directly with the inductor current.

III. ASYMMETRICAL TRAPEZOIDAL CURRENT MODE
The trapezoidal current mode requires that the voltages v L1 and v L2 be precisely time coordinated. The full-bridge works Ts t 7 + 2Ts 5Ts t 3 + 3Ts with unipolar modulation, generating an asymmetrical square waveform v L2 defined by the transition times (t 2 , t 4 , t 6 , t 8 ) in a period T s , as is shown in (4).
On the other hand, v L1 is a three-level voltage defined by the commutation times (t 1 , t 3 , t 5 , t 7 ), if a proper three-level modulation is applied to the v stack and all the capacitor voltages in the cells are balanced and equal to V C . If the stack modulation is centered in N o cells and the voltage amplitude is generated by N a cells, the stack voltage v stack can be expressed as Therefore, v L1 is a three-level centered on zero voltage if (6) holds and the high-voltage Kirchhoff's loop is considered Thus, the stack modulation defines the step-down voltage ratio r S (7) between the maximum ac-link voltagev L1 and the high-voltage V HV .
The highest voltage step conversion is achieved when this ratio is minimized (with N a = 1 and N o = N − 1), considering the restrictions of minimum number of cells feasible for the modulation (N a ≥ 1) and the maximum limit of N cells available (N o + N a ≤ N ). However, it is possible to adjust N a and N o to different values for voltage reconfiguration, redundant operation or in case of failure in any cell. The voltage balance among cells can be achieved through a sorting modulation or a time-controlled phase-shift modulation [10]. The phase-shift modulation waveforms for each cell are illustrated in Fig. 2, taking N = 5 and the highest voltage stack conversion as an example.
Considering the previous stack modulation, a trapezoidal current through the inductor could be generated by managing the commutation times t i as is shown in Fig.3(a) and it achieves ZCS for half of the commutations (t 1 ,t 4 ,t 5 and t 8 ) if with the duties cycles D i defined as in Fig.3(a) and The ac link voltage ratio r V represents the ratio between the amplitude of the voltages at both sides of the inductor (v L1 and v L2 ) and it needs to be r V = 1 for a perfect trapezoidal current. However, in the following analysis it is considered as a parameter for a general operation.

IV. DYNAMIC BALANCE OF POWER
To modeling exchange of power between the high-voltage port, the low-voltage port and the cell stack, the area covered for the inductor current in the positive (A 1 T RAP ) and negative (A 2 T RAP ) cycles of the switching cycle f s are illustrated in Fig. 3 (a). These areas can be defined as function of the phase shift Φ i and the cycle D i (10), if the ZCS condition (8) holds.
The average power delivered by the high-voltage port at one switching cycle P HV is determined by the high voltage V HV and the sum of the areas A 1 T RAP and A 2 T RAP due to the inductor current waverform is the same as in the high-voltage port if filters are not considered. The expression for the highvoltage power P HV is shown in (11) using the relation (10).
From (11), the high-voltage average power P HV is null with symmetric operation (D 1 = D 3 and Φ 1 = Φ 2 ), leading to a no-feasible operation. Therefore, the asymmetrical operation is a requirement to achieve a steady-state power balance between ports. On the other hand, the average power in the low-voltage port at one switching cycle P LV is determined in (12), using the same method.
Thus, it is possible to control the power transfer between high-voltage and low-voltage ports through (11) and (12), keeping the voltage balance in the capacitors. The steady state balance is achieved if it is imposed that the powers remain identical at both sides of the converter without considering the power losses (P HV = P LV ), and the difference between these powers allows to charge or discharge the capacitors. A similar analysis can be performed for negative power flow inverting the phase-shift of voltages v L1 and v L2 (Φ 1 and Φ 2 ) as is illustrated in Fig. 3 (b). Therefore, these relationships allow full bidirectional control of the power flow maintaining the ZCS and voltage balance in the converter. The trapezoidal current mode provide a set of general solutions (Φ 1 , Φ 2 , D 1 , D 3 ) for a specific power transfer, which has two degrees of freedom. Thus, an optimisation problem can be defined for a given state to find the best solution from all feasible alternatives.

V. OPTIMIZATION
Because the soft-switching operation of the trapezoidal current mode naturally leads to reduced switching losses, the minimisation of the conduction losses rises as an attractive objective of the optimisation problem in order to reduce the total power losses and to achieve high efficient operation. Thus, the optimization problem is set to minimise the square of the rms inductor current per-unit i rms L,pu , due to the conduction losses of the passive elements and devices are proportional to the square of this rms current. The derivation of this rms inductor current per-unit as function of (Φ 1 , Φ 2 , D 1 , D 3 , r V ) yields to (13), considering the current base as I base = V HV ·r S 12fsL .
i rms L,pu = 12 Since the rms inductor current i rms L,pu is nonlinear, a nonlinear optimisation problem (NLP) is defined in (14) This NLP is numerically solved in MATLAB using an interior point algorithm [12] for a wide range of the parameters (r V , r S ) and power references. Thus, a lookup table can store the optimised results for future utilization and comparison.
A. Analytical approach at steady-state with r V ≈ 1 A significant analysis of the NLP problem is required to explain their results due to the solution of the problem is highly dependent on r V . Thus, an analytic approach to the NLP problem is subsequently made for some representatives cases.
For the case r V ≈ 1, the problem of minimise (i rms L,pu ) 2 is equivalent to the minimisation of Φ 1 +Φ 2 or the maximisation of D 1 +D 2 , as is demonstrated in [11]. This can be interpreted as the minimising problem of (i rms L,pu ) 2 is equivalent to the maximising of the current utilization in the time-window T s . If the current does not fit the entire time-window ( Fig. 3 (a)), this pulsating current generate higher rms inductor current than an equivalent current which utilize the full time-window (Fig. 4 (c)). Therefore, the solution of the NLP is allocated in the superior limit of the inequality constriction for D 1 and D 3 . Thus, it is possible to find the optimized solution if this constraint is considered as equality. Hence, the power function per-unit P pu can be found as a function dependent of Φ 1 and Φ 2 , solving the system of equations (15) which considers the steady-state constriction (P * HV,pu = P * LV,pu = P pu ) and the time-window maximisation. P HV,pu = P pu P LV,pu = P pu The power function P pu which solves (15) is illustrated in Fig. 4 (a) considering the more straightforward case to analyze (r V = 1) and r S = 1/9 as example. The contours lines of this surface and the numeric solutions of the NLP for different power references P * pu are shown in Fig. 4 (b), confirming that the optimal solution is allocated in these contours lines. The comparison of three feasible solutions for a reference of power P * pu = 0.8 is shown in Fig. 4 (c) to illustrate the negative impact on the inductor current of the non-optimal solutions (cases 1 and 2). From Fig. 4 (b), the NLP numerical solutions are allocated near the curve Φ 1 = Φ 2 . Thus, if the approximation Φ 1 = Φ 2 is imposed, the optimal power function can be simplified to The maximum power transfer for this case is shown in (17), noticing that it is obtained at Φ 1 = 1/6. Also, this maximum power is considered as the power base per-unit P base for all power expression in per-unit.
A similar analysis can be performed for the case r V < 1. Following the same idea, it is possible to find a power function dependant of Φ 1 and Φ 2 . The contours lines of the power function per-unit surface and the numeric solutions of the NLP for different power references P * pu are shown in Fig. 5 (a) for the case r V = 0.85. As in the previous case, the NLP numerical solutions are allocated near the curve Φ 1 = Φ 2 , allowing simplify the problem. However, there is a limit for the power range which is possible to find feasible solutions using the contours lines. The new superior limit of this power range is determined by the limitation of the parameter r V due the power is almost proportional to r V , as can be seen in (12). This limit case is illustrated in Fig. 5 (c) considering r V = 0.85 and

Case 2
Ts r S = 1 9 as example, generating a maximum power transfer of P * = 0.844. On the other hand, the inferior limit is achieved when the current is no longer trapezoidal at Φ 1 = 0 and P * = 0.326. At this limit case (Fig. 5 (b)) the current starts to be triangular, enabling the asymmetric triangular current mode (ATCM) with r V < 1 for power references lower than the inferior limit [13]. Thus, ATMC is able to modulate through the duty cycle beyond this limit if the time-window restriction (15) is released. Furthermore, the ATCM is also the solution of the NLP problem, achieving the minimal rms inductor current in this power range.
The analysis for the case r V > 1 is similar. The contours lines of the power function per-unit surface and the numeric solutions of the NLP for different power references P * pu are shown in Fig. 6 (a) for the case r V = 1.15. As in the previous case, the NLP numerical solutions are allocated near the curve Φ 1 = Φ 2 , and the limit cases are illustrated in Fig. 5 (b)(c). The inferior limit for the power P pu is achieved when the current is no longer trapezoidal at P * = 0.392. At this limit case ( Fig. 6 (b)) the current starts to be triangular, enabling the asymmetric triangular current mode (ATCM) with r V > 1 for power references lower than this limit. Therefore, trapezoidal and triangular current modes are complementary modes for an optimized modulation. This general approach allows incorporate ATCM in the analysis, noticing that the ATCM are particular cases of the trapezoidal current mode when some conditions are achieved. The ATCM waveforms for both cases are shown in Fig. 7, noticing that the ATCM is a particular case of the trapezoidal current mode Thus, it is possible to create a control map ( Fig. 8 (a)) for a wide r V range. This map defines three complementary modes: trapezoidal, triangular r V < 1 and triangular r V > 1 if the previous analysis of the power range in term of r V is extended for the interval (0,2). The set of steady state equations for the per-unit power P pu considering this three different modes are summarized in the Table I. These equations allow to obtain the optimized operation point (Φ 1 , Φ 2 , D 1 , D 3 ) for each power reference P * pu .
B. Control scheme Fig. 8 (b) shows the proposed control scheme, which can be implemented with two control-loops for the output voltage V LV and the mean value of the stack capacitor voltages V C . To regulate the output voltage, a PI controller is considered due to the linear relation between the power P LV and the output voltage V LV given by the output filter. The mean value of the stack capacitor voltages V C is also controlled through a PI controller, which set the power in the stack to keep this voltage in the required value V * C of the stack modulation. The Power balance The parameter r V is calculated using the equation (8) and r S is determined by the stack modulation. Both parameters plus the power references P * LV and P * HV define the NLP problem to minimise the rms inductor current, which is solved by the NLP solver block in order to calculate the duty cycles. This Fig. 6. Power contour lines with r V = 1.15 and r S = 1 9 . Waverforms for limit cases using trapezoidal mode.
NLP solver block could be implemented as a look-up table that stores the results of the optimisation problem previously solved offline or as a set of equations (Table I) and the control map which select the operation mode at steady-state.
The voltage balance among cells is achieved through a timecontrolled phase-shift modulation [10], which is implemented in the modulation block.

VI. RESULTS
The high step ratio MMC dc-dc converter with singlepole configuration is simulated at full-scale, considering the parameters listed in Table II. The NLP solver block of the control scheme is implemented as a set of equations (Table  I) and the control map which select the operation mode at steady-state. Fig. 9 (a) shows the V LV step response of the converter emulating a black start operation until reach the output voltage reference V * LV . The dynamic behaviour of the duty cycles ( Fig. 9 (b)) shows a soft response even in the triangulartrapezoidal transition (this transition occurs when Φ i start to be different of zero at 19 [ms]). Also, the MMC capacitor voltages are balanced even under different capacitance in the cell capacitors, as is shown in Fig. 9 (c). Finally, the aclink waveforms show the current and voltages at the inductor ( Fig. 9 (d)), verifying the reduced rms current operation. The zoomed captures confirm the soft-switching operation of the converter regardless of the value of the output voltage V LV .
The overall simulated efficiency is over 98% at nominal power. The following power losses were taken into account: (i) IGBT conduction losses; (ii) IGBT turn-on and turn-off switching losses; (iii) diode reverse recovery losses; and (iv) diode conduction losses. The power losses in the cells stack at full power represents 81.3% of total losses and are composed mostly by conduction losses (94%) due to the ZCS operation. The power losses in the low voltage full-bridge at full power represent the other 18.7% of total losses and are distributed more evenly between conduction (73%) and switching losses (27%).
Duty Cycle

VII. CONCLUSIONS
A ZCS modulation for the high step ratio MMC dc-dc converter in a wide voltage operation has been presented. A simple control scheme is proposed to control output voltage, implementing the analytical results of the minimum peak-peak current optimization problem. Theoretical analysis has been verified with full-scale simulations, showing excellent dynamic response and voltage balance under transient conditions. The experimental validation will be carried out over the next few months.