Complementary lateral-spin-orbit building blocks for programmable logic and in-memory computing

Current-driven switching of nonvolatile spintronic materials and devices based on spin-orbit torques offer fast data processing speed, low power consumption, and unlimited endurance for future information processing applications. Analogous to conventional CMOS technology, it is important to develop a pair of complementary spin-orbit devices with differentiated magnetization switching senses as elementary building blocks for realizing sophisticated logic functionalities. Various attempts using external magnetic field or complicated stack/circuit designs have been proposed, however, plainer and more feasible approaches are still strongly desired. Here we show that a pair of two locally laser annealed perpendicular Pt/Co/Pt devices with opposite laser track configurations and thereby inverse field-free lateral spin-orbit torques (LSOTs) induced switching senses can be adopted as such complementary spin-orbit building blocks. By electrically programming the initial magnetization states (spin down/up) of each sample, four Boolean logic gates of AND, OR, NAND and NOR, as well as a spin-orbit half adder containing an XOR gate, were obtained. Moreover, various initialization-free, working current intensity-programmable stateful logic operations, including the material implication (IMP) gate, were also demonstrated by regarding the magnetization state as a logic input. Our complementary LSOT building blocks provide an applicable way towards future efficient spin logics and in-memory computing architectures.


Introduction
For more than half a century, conventional microelectronic logic circuits based on complementary metal-oxide-semiconductors (CMOS), i.e. the electron (n-) and the hole (p-) type charge conduction devices, have been developed to assemble the present von-Neumann computing architecture. Generally, the information represented by charge carriers are volatile, which has to be transported frequently between the logic processing unit and the memory devices, and thereby consuming massive unnecessary powers while generating undesirable joule heating. As a promising solution to these problems, spintronic devices that utilize the nonvolatile electron spins in a ferromagnet have been suggested by the community over the past decades [1][2][3] . Particularly, technologies of spin-transfer torque (STT) [4] and then spin-orbit torques (SOTs) [5][6][7] not only offer fast data processing speed and low power consumption, but also provide capabilities of programmable spin-logic operations [8][9] as well as non-von-Neumann in-memory computing applications [10][11] . Analogous to CMOS technology, it is important to develop complementary spintronic logic building blocks [12][13][14][15] , i.e. two type of basic spintronic devices that response distinctly to the same input signal, for facilitating complex logic functions with simplified circuit design.
Typically, the SOT-induced magnetization switching with perpendicular magnetic anisotropy requires the assistance of an in-plane external magnetic field [5] , the direction and the magnitude of which determine the switching direction and the critical switching current density. Inspired by this unique feature of SOT switching, 4 / 22 naturally, approaches of external magnetic field-dependent complementary spin-orbit logic devices have been proposed [8,16] . Recently, more scalable SOT technologies with external magnetic field-free switching have also been successfully demonstrated, and the magnetization switching direction can be controlled by various methods, such as introducing a build-in in-plane exchange magnetic field [17][18] and adjusting its direction, creating a spin current gradient [19][20] and tuning its polarity, manufacturing a lateral wedge oxide [21][22] and engineering its tilting orientation, and so on. Following these ways, field-free complementary spin-orbit logic pairs can be reasonably proposed, however, problem of either the existence of an unscalable in-plane coupling FM layer, or the fussy multi-terminal (terminal number > 3) SOT-MTJ device design, or the incompatibility with standard magnetic tunnel junction (MTJ) as well as the difficulties in manufacturing procedure, makes those potential complementary spin-orbit logic proposals not applicable for industrial realization. Thus, magnetic field-free complementary spin-orbit logic pairs with integration-friendly approaches are strongly desired.
Recently, a novel lateral spin-orbit torques (LSOT) induced field-free deterministic magnetization switching has been demonstrated in a locally laser annealed perpendicular magnetic anisotropy (PMA) Pt/Co/Pt structure, the switching orientation is dependent on the relative local annealing location of the in-plane current (for example, along x direction) and the laser track (also along the x direction, but lies on either -y or +y side of the sample) [23] . Inspired by this integration-friendly approach, here we show how a pair of magnetic field-free complementary LSOT logic devices 5 / 22 can be demonstrated as building blocks for programmable and stateful logic operations. By setting the polarity of initialization electric current, basic Boolean logic gates of AND/OR (NAND/NOR) were programmed in a single -y (+y) side laser annealed LSOT device, and an half adder containing the nonlinear separated XOR  Demonstration of initialization current-programmable Boolean logic gates using the above two devices. Binary logic inputs of two current pulses I A and I B (-/+4 mA stands for logic value "0"/"1") were applied along the Hall bar channel simultaneously.

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The resulting nonvolatile current-induced magnetization down/up state represented by the negative/positive V Hall was regarded as logic output value "0"/"1". A necessary initialization current I init of -8 mA (orange pulses in (d)) or +8 mA (purple pulses in (g)) was applied on the devices before each operation, the polarity of which defined the type of the logic gate. For I init = -8 mA, the -y and the +y side locally laser annealed devices showed (e) AND and (f) NAND gates, respectively. Meanwhile, for I init = +8 mA, the -y side and the +y side locally laser annealed devices showed (h) OR and (i) NOR gates, respectively. The x-axis of (d-i) are operation procedures with same scales and values. lateral Pt-Co asymmetry after laser annealing [23] .
However, single-device implementations of n different logic gates require devices with at least totally n possible different modes. Hence, in order to realize the 4 logic gates shown in Figure 1a, another binary variable, i.e. the initial magnetization state Remarkably, for initialization current I init = -/+8 mA, complementary Boolean logic gates of AND/OR and NAND/NOR were realized in the -y and the +y laser annealed LSOT devices, respectively. It is worth noting that the demonstrated NOR gate can also act as a NOT gate of input I A when I B is fixed at "0". CMOS-based half adder consists as many as 18 transistors [14] . As shown in Figure 2a, the simplest half adder design incorporates an XOR gate for SUM and an AND gate for CARRY. Unlike the linearly separable logic gates shown in Figure 1, the XOR gate is a linearly inseparable logic function that requires to define two logic thresholds for device with a monotonic input-output response, and thereby hardly possible to be implemented by a single device or simple circuits.
Nevertheless, the XOR gate can be formed by an OR gate and a NAND gate.
Following this way, two complementary -y and +y side laser annealed LSOT devices, denoted respectively as P and Q in Figure 2b, were connected for the XOR implementation. When programming the initialization currents of P and Q to be = +8 mA and = -8 mA, OR and NAND gates were obtained, respectively, and the synthetic output of ( + ) was shown in Figure 2c. Binary outputs of around 0 (defined as logic value "0" here) or 40 μV (logic value "1") were found, corresponding to the resulting magnetization states of either P being spin down/up and Q being spin up/down or both P and Q being spin up. Thus, nonlinear separated logic gate of XOR was realized, which can work as SUM for a half adder. Together with another -y side laser annealed LSOT device denoted as S, which performed AND were referred to I-R logics. However, future in-memory computing, which aims to eliminate the memory wall problem [24] in von-Neumann computing architecture, requires R-R logic gates that the processing devices can not only store output data but also perform stateful logic operations by regarding their initial states as input variables at the same time [25][26][27][28] . In the following section, we will firstly demonstrate stateful A key difference between the I-R and the R-R logic gates is the role of the initial magnetization state, which act as the programming term and the input variable for the I-R and the R-R gates, respectively. On the one hand, this makes stateful R-R logic gates naturally free from initialization operations; on the other hand, other programming methods have to be involved for assembling multi-functional R-R gates in a single device, or the device would only perform as one specific gate. As shown in Figure 3, a working current pulse I w was simultaneously applied with I A to program the overlapped I ovlp = I A + I w . Particularly, five working modes with respective relationships between I ovlp and the critical switching current ±I c shown in Figure 3a and 3c were derived for I A = +6 mA (as logic value "0") or + 12 mA (as logic value The working paradigm of above IR-R spin logic gates is thought to be applicable for other types of current-driven magnetization switching devices as well. However, advantages of the complementary LSOT devices used here should be underlined due to their capability of significantly enriching the in-memory functionalities and thereby fabricating more straightforward circuits. For example, a -y side laser annealed LSOT device can act as an in-memory 3-input majority gate (MAJ) [10] if the I w is also considered as a logic input. A MAJ returns "1" if and only if the majority (more than half) of its inputs are "1". Refer to the AND gate ( , abbr. I A R Hall ) as shown in Figure 3b3 and the OR gate ( ⋁ ) as shown in Figure 3b5, when I w = -15/-3 mA is defined as logic input "0"/"1", the logic output can be expressed as "< >" is the logic operator for MAJ. Together with the +y side laser annealed LSOT device, which can be programmed to the functionally complete IMP gate [29] as shown in Figure 3d3, spin-orbit in-memory computing circuit designs with versatile reconfigurable operations are promising.

Conclusion
In summary, a pair of magnetic field-free complementary LSOT devices with