An Active Modulation Scheme for Avoiding Overcharging in the Dual Converter with Isolated Asymmetric Supplies

This paper presents an enhanced modulation technique for dual converters with isolated supplies. This unified modulation technique is applicable for any positive voltage ratio between the isolated supplies. The modulation technique enhances the quality of converter output voltage compared to using previously reported methods. The effectiveness of the proposed technique is validated and results are presented for an open-end winding induction motor to demonstrate the advantages.


Introduction
Multilevel converters are one of the most promising choices for motor drive applications. This is mainly due to their reduced dv/dt [1], better power quality [2] and lower losses compared to traditional two-level converters [3]. Lately increasing attention has been paid to dual converter topologies, due to their: 1) high availability rising from the rich redundant states [4]; and 2) capability of generating more levels than other multilevel converters, for a given number of switches [5]. In terms of architecture, the dual converter employs either two standard two-level or two multi-level converters [6], connected to an openend winding machine, as shown in Fig. 1.
The symmetrical voltage ratio of 1:1 (i.e. both converters using the same voltage level) has been initially adopted for the voltage supplies, which allowed for three-level operations [5]. In order to improve the voltage quality, the asymmetrical voltage ratio of 2:1 has been introduced achieving four-level operation [7]. However, by using an asymmetrical ratio, DLC (DC-Link Capacitor) with the lower voltage might CON 1

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Open-End Winding AC Motor suffer from overcharging. In Fig. 1, CON1 and CON2 are fed by two independent voltage sources at V dc,1 and V dc,2 , respectively, where V dc,1 = 2 * V dc,2 (i.e. voltage ratio 2:1). During standard modulation operations, the phase current would flow into the DLC of CON2 leading to the capacitor overcharge, thus the voltage ratio of 2:1 is not maintained. This variation on the voltage ratio of 2:1 results in undesired harmonic into the motor phase voltage [8,9].

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To overcome the overcharging problem, there are generally two approaches: the first consists in utilizing selected switching states [8,9,10,12], while the other employs additional hardware [13,14,15]. Choosing the first option implies a preliminary study on the current flow according to the switching states, in order to identify the overcharging states. This initial analysis is often performed by assuming the current direction [8,9,10,12] that is actually affected by the load power factor [5]. The overcharging states would not be utilized even though they are necessary for modulation [9,10], thus causing a significant voltage quality drop [11].
Regarding the hardware solution, a structure of nested rectifier-inverter was described in [13]. In this topology, CON 2 with the lower DC-link voltage is nested within higher DC-link voltage that feeds CON 1. However, the main drawback of this solution lies in the use of one more isolated DC supply, which considerately increases both the volume and cost of the motor drive system [10,12]. This paper presents a modulation scheme aiming to address the DLC overcharging issue. The proposed method does not require extra hardware and the output voltage quality is remarkably improved compared to the strategy currently available in literature. For the dual converter, the phase voltage applied to the electrical loads is the difference between the voltages produced by the two converters (CON 1 in Fig. 2 (a) and CON2 in Fig. 2 (b)), and the resulting space vector diagram is shown in Fig. 2 (c). Thus, the load voltages can be represented with the switching states of two converters. For instance, the switching state (15') denotes (1)(100) for CON 1 and (5')(001) for CON 2. With the asymmetric voltage ratio of 2:1, the dual converter produces 37 vectors from 64 switching states and the machine phase voltage is a 4-level voltage.

Current Flow by Switching Vectors
During the modulation process, the phase current i a , i b and i c as shown in Fig. 1 would flow into DLC and may cause it overcharged. Fig.3 shows several cases of current flow into DLC, where the line colour implies the flow path of different phase current. Green colour represents the path of current i a , red indicates the path of current i b and blue shows the path of current i c . For example, in Fig. 3 (a), the current i a acts on the positive pole of DLC, for the state (11'). Regarding the state (27'), there is no current passing through the DLC, as shown in Fig. 3 (b). In Fig. 3 (c) and (d), the current flows resulting from the switching states (16') and (23') are shown, respectively. The current i b flows into the positive polarity of DLC in the case of (23'), whilst it flows into the negative polarity of DLC for the switching state (16'). The former case is denoted as +i b , whereas the latter one is indicated by -i b .
The summary of all applicable switching states and their corresponding current flow into DLC i.e. I dlc are detailed in Table I. The sign (±) means that the switching vector has redundant states, and it could allow phase current flowing into the positive and negative polarity of the DLC.

Proposed Method
For avoiding the DLC overcharging, the proposed method is based on the flowchart shown in Fig. 4 and it requires the feedback of the instantaneous phase currents i abc (current sensors are already installed on the electric drives), along with the reference vector V re f for modulation. Knowing the location of V re f in terms of sector and region, the nearest three vectors (NTVs) and their switching time are determined. According to the NTVs, the corresponding current affecting the DLC can be found as stated in Table I.

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A' B' C' (16') 100 101     Considering the application of vector V9 (see Fig. 2) for modulation, such vector is given by two redundant switching states, i.e. (23') and (16'), that respectively lead to the currents +i b and −i b on the DLC (see Table I). In order to prevent a current flowing into DLC (i.e. capacitor overcharging), the switching states (16') is applied when i b > 0, whereas (23') is chosen in case of i b < 0. In particular, vector V 9 can be applied regardless of the current i b direction.

Simulation Results
A simulation model of the motor drive system with dual converter is built within PLECS environment. Besides, the parameters of system will be included in Table II.

DC Machine
PP PP PP PP PP PP P P P P P P P P P P P P P P P P PP with inner current control loops is adopted [16]. The SVM (space vector modulation) modulator (in grey in Fig. 5) is the core part of whole control system. It takes the responsibilities of modulating the reference vector and, at the same time, avoiding the DLC overcharge. The switching vectors are derived from the modulation process, while the switching states are allocated according to the Fig. 4's flowchart. Firstly, the simulation results of the motor drive system without the active modulation scheme are shown in Fig. 6 (a) and (b), where the no-load and the full-load operating conditions are respectively investigated [17]. According to the voltage ratio of 2:1, the voltage V dc,1 (CON1) is equal to 540V, whilst 270V is chosen for V dc,2 (CON2). At the early stage of the simulation (from 0 to 0.1s), the induction machine is magnetized and then the speed reference ω re f of 900rpm is applied at 0.5s. In the third subplot of Fig. 6, the current I DLC flowing into DLC (i.e. the capacitor of CON2) is displayed. It is obvious that the current I DLC is positive and negative proportionally. This results in an overcharged DLC and V dc,2 is beyond the reference voltage of 270V. Consequently, the phase current and voltage in Fig. 6 are distorted. In particular, the total harmonic distortion (THD) values of phase voltage and current shown in Fig. 6 (a) are 39.1% and 8.0%. respectively. Considering the full-load condition of Fig. 6 (b), the obtained THD values are equal to 29.8% for the phase voltage and 3.2% for the phase current.
In order to prove the effectiveness of the proposed active modulation scheme, the simulation results obtained using the proposed active modulation method are shown in Fig. 7. From these subplots, it is possible to observe that the current I DLC is never positive, hence no current tends to overcharge the DLC. Indeed, the DLC voltage remains constant throughout the simulation time (see second subplots of Fig. 7). Considering the last two subplots of Fig. 7 (a), the phase current and voltage are not affected by the implementation of the proposed method. Thus, the DLC overcharging is avoided without compromising current and voltage waveforms' quality. It is worthy to mention that the phase voltage in 7 (b) is a 11level operation, which is the characteristic of 4-level operation. In particular, the THD of phase voltage and current in Fig. 7 (a) are 33.6% and 3.2%. Regarding Fig. 7 (b), the resulted THDs are 25.2% and 0.9%, respectively. Compared to results of Fig. 6, the superior output quality of the proposed scheme is validated. The presented simulation results prove the effectiveness of the proposed method in preventing the DLC overcharging. As previously mentioned, the DLC overcharging issue has been already addressed in literature and several modulation strategies, based on the selection of switching states, have been introduced. Aiming at highlighting the advantages of the proposed method, it is compared to the approach discussed in [7], which has been selected as benchmark. In Fig. 8 and Fig. 9, the motor drive performance comparison by these two methods are demonstrated. In the simulation, after t = 0.5s, the speed reference ω re f is assigned to 900rpm, and there is an additional load torque T L of 30N*m applied at 1s. From Fig. 8 (aii) and Fig. 8 (bii), the voltage V dc,2 remains stable at 270V during the whole period for both the considered modulation strategy. For the method in [7], the current I LVC reveals positive values within the time window 0.5 -1s, as observable in Fig. 8 (aiii). Hence, a slight overcharge occurs when method in [7] is simulated. As shown in Fig. 8 (biii), the current I LVC is negative throughout the whole simulation, in case the proposed method is implemented. This means that the information of 3-phase current needs to be acknowledged before choosing the switching states in order to ensure the absence of overcharging.
Apart from examining the DLC current, a further comparative analysis between benchmark and proposed methods is shown in Fig. 9. In particular, from Fig. 8, two time windows, i.e. 0.96 -1s and 1.46 -1.5s, are (a) (b) Fig. 9: Phase voltage and phase current performance by a) method in [7]; b) the proposed method.
considered as examples of no-load and loaded conditions, respectively. Looking at Fig. 9 (a), the phase voltage corresponding to the benchmark method features undesired voltage steps, which are avoided by adopting the proposed active regulation scheme, as visible in Fig. 9 (b). This results from the abandoned vectors for the method in [7]. Consequently, the enhancement of output quality can be noticed by the current THD numbers in Fig. 9 at the switching frequency of 2kHz. Indeed, the benchmark method leads to THD phase current values of 5.37% and 3.16% for no-load and load conditions respectively (please refer to Fig. 9 (a)). Employing the proposed method, the obtained THD phase current values are dropped to 3.00% in case of no-load operations, while 1.65% is achieved at load condition, as shown in Fig. 9 (b).

Conclusion
In this paper, an active modulation scheme with current feedback is proposed to avoid overcharging problem of the dual converter with isolated asymmetric supplies. Simulation results have been presented to demonstrate the feasibility of the proposed technique. More importantly, due to utilisating all essential vectors for modulation, the proposed active regulation scheme could considerately enhance the output quality compared to methods already available in literature.