Geometrical Visualization of Indirect Space Vector Modulation for Matrix Converters Operating with Abnormal Supplies

: Matrix Converters can be sensitive to abnormal supply conditions due to the absence of energy storage elements. This sensitivity can get worse when the Matrix Converters are modulated by a traditional Indirect Space Vector Modulation that assumes the input variables are sinusoidal and balanced. Therefore, this paper proposes a methodology for the modulation of Matrix Converters without requiring any assumption of the input voltages. The method uses a geometric representation based on the Singular Value Decomposition of the switch states to synthesize the rotating vectors of the target duty-cycle matrix. Furthermore, this paper mathematically highlights the factors that have regulate the amplitude of the output voltages and utilizes them to compensate the adverse effect of the abnormal input voltages. Experimental results presented in this paper validate that the proposed method can provide sinusoidal and balanced output currents in the presence of abnormal supply conditions.


Introduction
The matrix converter (MC) is one of the well-known topologies for AC-AC power conversion due to its inherent advantages such as bi-directional power flow, adjustable input power factor and high power density [1][2][3][4]. The compactness and potentially long lifetime resulting from the elimination of bulky electrolytic capacitors make the MC and its topology derivations suitable for offshore wind farms [5,6], solid-state transformers [7,8] and more-electric-aircraft applications [9][10][11][12].
A good implementation of a suitable modulation is fundamental to achieve good performance from any power converter. Many methods have been proposed for the modulation of MCs [13], including the scalar type methods [14] and vectorial type methods [15,16], to optimize the switching sequence [17], to improve the output quality [18][19][20][21], to increase the voltage transfer ratio [22] or to feature the over-modulation capability [23]. Among them, the indirect space vector modulation (ISVM) method is widely used due to its easy implementation [24]. Many derivations of this traditional ISVM assume sinusoidal and balanced supply and load [24,25]. However, when the input voltage disturbances are not compensated properly, the output voltages may contain unwanted harmonics Both feedback control and feedforward compensation can be used to counteract the low-frequency undesirable supply voltage fluctuations [25][26][27]. Many closed-loop control algorithms have been widely reported in literature. However, since the transfer characteristics between the supply voltages and the load currents are nonlinear and complex, it is difficult to design a controller with very good performance under all operating conditions. Therefore, the feedforward method is preferred because it provides faster response and is easier to design and implement. Given that the instantaneous input voltages have to be precisely measured in most MC applications, it is intuitive to use the measured quantities in an open-loop controller to compensate any input distortion [14][15][16].
The feedforward method can be incorporated into the ISVM technique by modifying the switching functions of either the virtual rectifier or inverter to suppress the input disturbances [28][29][30][31][32][33][34]. This is analogous to the pulse width modulation algorithms for traditional back-to-back converters [24]. In [28][29][30], the rectifier switching functions are regulated appropriately to eliminate the influence of the abnormal supply voltages and generate a constant (on averaged) DC-link voltage. The load side switching functions can then be selected as the same way as in a regular inverter. However, the averaged DC-link current is variable, which can complicate the input current synthesis. If the rectifier switching functions are chosen to be sinusoidal which results in a constant DC-link current but a varying DC-link voltage, the inverter switching functions have to be modified accordingly to maintain sinusoidal and balanced output waveforms [30][31][32][33]. It is also possible to regulate both input and output side switching functions synchronously in one step [34]. However, in this case both the DC-link current and voltage are varying, which makes the feedforward compensation more difficult.
The existing modified-ISVM methods discussed above rely on the DC-link concept [24]. They inevitably change the DC-link voltage or current when regulate the switching functions. Unfortunately, it is difficult to derive and calculate the analytical solution for either the transient or the averaged DC-link voltage and/or current, especially when the inputs are abnormal [26]. Further, these ISVM methods decompose the input and output quantities into symmetrical components or harmonics components. Such decompositions might be useful for harmonic analyses but are not necessary for the feedforward compensation and modulation calculation.
The interpretation and implementation complexity discussed above is due to the tradition that modulation derivation is relied on voltage/current space vectors [24] or similar quantities [26] formed by switch states and system input variables together. Whereas, in fact, the switch states present the inner connection of a MC regardless the variations of the input voltages and the output currents. Therefore, it is more applicable and preferable to separately consider the switch states and the system inputs of MCs [35][36][37].
Investigation into the switch states has therefore become significant in deriving new modulation algorithms for MCs. In this paper the method presented in [36] is extended and experiment results are presented to validate the method. To start with, this paper applies the singular value decomposition (SVD) technique to the space vector transfer functions of switch state matrices rather than the duty-cycle matrices. It is worthy to point out the fact that there are numerous duty-cycle matrix solutions but only limited number of switch state solutions to the matrix converter input/output transfer functions. The decomposed matrices have sequential geometrical operations that rotate the vectors of system inputs. This can be used to demonstrate how the MCs manipulate their input voltages and output currents to their counterparts at the corresponding output and input sides, and thus reveal the intrinsic properties of switch states. After representing the decomposed submatrices by their equivalent vectors with the same rotation effects, the space vector modulation (SVM) technique can be adopted to select appropriate switch states and then synthesize them to be the continuously rotating local-averaged reference variables.
The findings presented in this paper provide a new understanding of the modulation process. Accordingly, motivated by counteracting the abnormal input voltages, this work proposes a flexible ISVM algorithm for both direct and indirect MCs. The main contributions of this paper are: • Geometrical interpretation: A geometrical interpretation for the switch state and the duty cycle matrices of MCs is presented according to the physical meanings of SVD. This provides an understandable visualization for the modulation process.
• Feedforward compensation: It proves mathematically that the modulation index, the amplitudes of the virtual rectifier and virtual inverter switching functions present the same feedforward capability.
• Flexibility: The vector representation of the switch states makes the utilization of the SVM technique possible and easy, which leads to improved flexibility in terms of the switch state selection, the duty cycle calculation and the switching sequence arrangement.

Singular Value Decomposition based Indirect Space Vector Modulation Method
A three-phase-to-three-phase direct MC is shown in Fig. 1(a). Typically, the converter input is a three-phase voltage source because of the nature of the grid and/or LC filter, while the output is a current source since the MC is usually used to feed inductive loads such as motor drives. The MC connects two different types of sources via a 3 × 3 switch array. Thus, short circuits between the input lines meanwhile open circuits at each output phase should be prohibited for safe operation.
With the help of the indirect transfer function approach [24], the single-stage MC in Fig. 1(a) can be mathematically divided into a two-stage one as shown in Fig. 1(b) where p and n represent the positive and negative virtual DC bus, while a, b, c the three input phases and A, B, C the three output phases. This is the so-called "Indirect MC" where a current source rectifier (CSR) connects directly to a voltage source inverter (VSI). Due to the existence of the fictitious DC-link, only 21 out of all 27 valid SSMs for direct MCs have equivalent connections in indirect MCs and therefore explored in this work.
For the sake of simplicity, the input/output relationship of the MC system can be expressed in the αβ-coordinates as given below [36], where Sxyz is the switch state matrix (SSM), i.e. the space vector represented transfer matrix with xyz standing for the input phases that are linked to the output ones [36,37]. For example, when the three output phases A, B and C are connected in turn to the input phases a, b and b, Sxyz can be written as S abb . The superscript "T " denotes the transpose. Here, the input voltage space vector can be expressed by its column vector as v i = v iα + jv iβ . Similarly, the output current space vector is obtained, io = ioα + ji oβ . They together are the system inputs, while the output voltage space vector vo = voα + jv oβ and the input current space vector i i = i iα + ji iβ are the system output variables.  The typical topology of a three-phase direct matrix converter [36] and (b) its simplified two-stage indirect derivation [24].
The existing modulation methods were derived based on the space vectors or similar quantities that are the products of switch states and systems inputs [14][15][16][24][25][26][27][28][29][30][31][32][33][34]. For example, in [24] the line-line voltage space vector can be defined by In abnormal input voltage scenarios, the resulting discrete space vectors are with varying amplitudes. This violates the assumption of constant amplitude vectors as that in regular PWM inverters, and makes the modulation process intricate [26]. To avoid the varying vector problem and to explore the inherent features of the MC, this work derives a novel but simple ISVM algorithm starting from analyzing the valid SSMs only rather than their corresponding voltage and current space vectors.

Singular Value Decomposition of Switch States
From the matrix theory, all SSMs have transforming effects between the system input and output space vectors. In order to reveal such transformation, the SVD technique is applied to the matrix Sxyz, on account of the similar geometric operations between SVD and Sxyz. This results in a set of multiplied matrices, representing as Sxyz = U * D * V T , where both U and V are unitary matrices, while D is a diagonal matrix [36][37][38][39]. Note that the SVD technique used in this work is not for principle component analyses but to provide insights to the intrinsic properties of the SSMs of MCs and categorize them into groups, with the help of the geometrical meaning of SVD. All 27 SSMs have their own decompositions which are listed in Table 1 (where xxx means aaa, bbb or ccc) [36]. They have a series of sequential effects on the input vectors in (1). Within them are the Type II Switch States (T2SS) that connects two and only two output lines to one common input phase. The unitary matrices U and V retrogress to rotation matrices while the secondary gain in D is always zero.
Take Sacc as an example, shown in Fig. 2. Its expression in αβplane can be calculated, and decomposed: According to the geometric meaning of the SVD technique, the matrix V T of Sacc rotates any input column vector in (1) by −30 • , or equivalently V rotates the input coordinate by 30 • . Note that the transpose of a rotation matrix effectively rotates by a negative angle. Then, the matrix D scales the d-axis of the resultant vector Fig. 2: The geometrical meanings of the SVD upon the switch state Sacc. by 2/ √ 3 while zeroes the q-axis component. Finally, the matrix U rotates the intermediate quantity DV T v i by 0 • to obtain an output vector. S T acc has a similar operation but in reverse sequence on the current relation.
The switch states Sacc may have other SVD results, like From the geometric perspective, the matrices in (5) All these rotation vectors are with unity amplitude and fixed angles. They form two hexagons and evenly divide them into six sectors respectively, as shown in Fig. 3(a). However, they are distinct from their voltage and current counterparts in the existing ISVM algorithms [14][15][16][24][25][26][27][28][29][30][31][32][33][34] where the output line voltage and the input current space vectors depend on the products of the SSMs and the system inputs, and hence are varying in terms of length, as shown in Fig. 3(b). According to (3) and similar expressions to the current quantities, the resulting discrete vectors are determined by not only the switch states but also the DC-link voltage or current. Within one the switching cycle, since the DC-link voltage is rectified by the CSR, using two or more switching states, and thus has different transient values, e.g. v ab and vac (referring to vectors I 6 (a, b) and I 1 (a, c) in Fig. 3(b)) [26]. This corresponds to varying vector amplitudes as shown by the grey area of the hexagons in Fig. 3(b). It is true even when systems inputs are sinusoidal and balanced. Under fluctuated input conditions, the deviations become more complex, where the amplitudes of the local-averaged hexagons in dot-dash line are not constant since the averaged DC-link voltage and current are variable. This phenomenon makes the vector syntheses intricate. On the contrary, our method provides a simpler and easier base to derive new modulation algorithms since both the amplitude and angle of the used vectors are constant. The T2SS are also summarized in Table 2 by matching the rotation angles between the decomposed Us and Vs and their equivalent rotation vectors in related hexagons of Fig. 3. For instance, the vector directing to pointer (1) in the left hexagon corresponds to the six T2SS in the first line of Table 2, while the one synchronously directing to pointers (1) and 1 in both hexagons is the SSM Sacc. The fact that both entries of (1) 1 and (4) 4 in Table 2 are the SSM Sacc can be explained by (4) and (5) in the example given above. In the rest of this paper, we use the same symbols to describe the rotation vectors in Fig. 3 (e.g. vector 1 ) and their corresponding decomposed rotation matrices (e.g. column 1 in Table 2). This notation method brings extra benefits for the switch state selection and the  (1) Saca S bcb S bab Scac S cbc S aba commutation arrangement which will be shown later in Section 2.3 and Section 3.2.

Geometrical Interpretation for the Duty-cycle Matrix
Time-averaging the valid SSMs will obtain the duty-cycle matrix whose representation in αβ reference frame has the similar SVD structure as given below [36], where matricesŪ,D andV are the local-averaged values of U, D, and V according to the duty cycles of the SSMs used in one sampling period. Both V and U are rotation matrices, so be their counterpartsV andŪ. g d and gq are the two local-average gain in the diagonal matrixD. Equation (7) satisfies the system equations (1) and (2) simultaneously and thus is a solution to the modulation matrix. In (7),V T rotates the input side quantities by −θ whileŪ T rotates the output vectors by −α. This also equals to thatV andŪ rotate the natural reference frame by θ and α respectively to form two rotating reference frames. In these rotating frames, the voltage and current space vectors at the input and output sides of the MC system can be decomposed, and their relations are determined by the diagonal matrixD. Since the T2SS listed in Table 1 [36] share the same zero secondary entries in the diagonal matrices, their corresponding local-averaged value gq inD always equals zero. This brings several benefits for implementing the modulation process.
Firstly, the voltage and current relations between two reference frames can be expressed below, where Vo and I i are the amplitudes of the output voltage space vector vo and the input current space vector i i respectively. They are constructed from parts of the input voltage and output current. Secondly, the q-axis component of vo, in the reference frame constructed by the matrixŪ, and the q-axis component of i i , in the reference frame constructed by the matrixV, are always zero because of gq ≡ 0 in (7). That means vo is always located at the rotation vectorŪ, while i i is always placed at the rotation vectorV. As a consequence, the output frequency and the input power factor can be controlled by the angles α and θ.
The SVD renders the modulation process a clear physical meaning as shown in Fig. 4. From the geometric perspective, the rotating reference frames thatV andŪ construct are the input and output synchronous reference frame rotating along with i i and vo. In both reference frames, the input and output frequencies are counteracted. For example, the vector i i in the stationary reference frame now becomes a scalar quantity i i e −jθ = I i in the input synchronous reference frame. The input voltage and output current space vectors are decomposed into dand q-axis components in their corresponding synchronous reference frames given the existence of input and output power displacements. But only their d-axis components are scaled and rotated back to the stationary reference frame, while the q-axis components are shrank to zero. Although two synchronous reference frames rotate at different frequencies, the relations of the decomposed components are determined only by the diagonal matrix D or the g d . Therefore, the parameters α, θ and g d form the three free variables to synthesize any desired amplitude and frequency of the output voltage and input phase displacement factor, while the amplitude of the input current is determined by the active power balance.
The rank reduction inD makes the indirect MC similar to backto-back converters and makes the quantity relationships at the virtual intermediate stage scalar regardless of the angle difference between two rotating frames in Fig. 4 as if there exists a the DC-link. It is worth noting that in Table 1 there remain six SSMs, connecting each output phase to one different input line, being valid for direct MCs but not indirect MCs. They are the Type III Switch States which have non-zero diagonal entries inD submatrices and thus have the rank of 2. Also, they preserve the unitary features in eitherŪ orV which has a determinant +1 or −1 [37]. This mathematically proves that when only using the SSMs in Table 2 the indirect MC is an incomplete equivalence of the direct MC which uses all 27 valid SSMs. Fig. 5: Examples of space vector syntheses using two adjacent vectors in the output (left) and input (right) hexagons.

Space Vector Synthesis
Since the used SSMs and their local-averaged duty-cycle matrices share similar SVD results that can be represented in vector formation, it is easy to synthesize the latter using the former. Once the output frequency and the input power factor are given or determined by the outer control loop, the rotating vectorsŪ andV can be portrayed in Fig. 3. Then they are assumed invariant during specific sampling period and can be synthesized by using the well-known SVM method [24]. Without loss of generality,Ū andV are assumed to locate in Sector I. They can be approximated by two groups of adjacent vectors respectively to maximize their amplitudes. As shown in Fig. 5, the duty cycle for each active vector can be determined as follows [36], where αsv and θsc are the angles of the two reference vectors with respect to the beginning of their sectors. Ū and V are the amplitudes ofŪ andV respectively. The vectors pointing to (1), (2) and 6 , 1 in Fig. 3 are used. They correspond to the SSMs in the lines (1), (2) and columns 6 , 1 in Table 2, i.e. S abb , Sacc, S aab and Saac. The first two SSMs have the same U and D, and thus approximate VectorV at the input hexagon meanwhile Vector (1) at the output hexagon with duty cycles being proportional according to dα and β in (9). The latter two SSMs approximate the same VectorV at the input side but Vector (2) at the output with duty cycles being proportional according to dµ and dγ in (10). Then, with the same VectorV, to synthesizeV andŪ synchronously, the duty cycles for the four selected SSMs have to be proportional, as given below, where the modulation index m is defined to regulate each duty cycle non-negative and their sum less than unity. The switch states used in this example are added in parentheses to the above formulae. It is important to note that the addition of vectors can be interpreted according to the addition of matrices because they have the same D orV orŪ in the SVD results. The the modulation index has two functions. Except for the total duty-cycle regulation, m will also influence the averaged d-axis gain ofD that is governed by: where σ d is the primary diagonal entry of D, i.e. 2 √ 3. According to (12), m, Ū and V can be used to regulate g d . However, the determinants of the desiredŪ andV in (7) are unity but the actual amplitudes according to (9) and (10)  the effective duty cycles are unchanged before and after this adjustment. In this work, Ū and V are chose as the maximum radii of the inscribed circles of their hexagons, i.e. √ 3 2 for the adjacent vector synthesis. Then g d = √ 3m 2. Now that g d is subject to m only, Eq. (11) can be rewritten, The remaining time interval within the sampling period is the duty cycle d 0 for the zero vectors formed by the T1SS, To complete the modulation process, the switching sequence among different switch states has to be arranged appropriately. The idea presented in [31,35] is adopted and shown in Fig. 6. When the sum of two sector numbers is even, an "u" shape pattern is utilized as the switching sequence. When this sum is odd, an "n" shape pattern is employed. T1SS can be placed at the beginning, the center or the end of the switching pattern. For the example discussed in this section, the first half of a double-sided switching sequence is arranged as (S bbb ) → S abb → S aab → (Saaa) → Saac → Sacc → (Sccc) where one to three T1SS within the parentheses can be used. The flexibility of arranging the switching pattern in this way are usually exploited to trade off the performance criteria among the commutation number, the switching loss, the output current ripple and the common-mode voltage.

Feedforward Compensation
A simple method to determine m is to set it to a constant, which leads to the same result as in [24]. Unfortunately, since the system input and output are coupled, the input distortion may deteriorate the output performance. For constant m, the low frequency harmonics of the input voltages can be transferred to the output voltages. Similarly, harmonic contents might also contain in the output side, then transfer back to the input currents, and distort the input voltages when the input filters are considered. The distorted input voltages make the output performance even worse. This is undesirable.
According to (8), the output voltage is made only from the d-axis component of the input voltages. Therefore, the voltage transfer ratio (VTR) q can be described by where ϕ i is the input displacement angle. From (12) and (15), the modulation index m can be determined as shown below: The only limitation for m is to maintain all duty cycles in (13) and (14) non-negative. According to (13) and (16) voltage space vector does not engaged in the modulation calculation, but it affects the input displacement factor and thereby the output regulation capacity. Substituting (16) into (13)-(15) leads to Therefore, once the input voltages are measured and the input power factor is specified, the modulation index can be adjusted accordingly to compensate the abnormal input variations and to maintain the amplitude of the desired output voltages. By this way, low-frequency harmonics in the input voltages can be eliminated from the output waveforms as long as the condition for m is satisfied. The relationship between the proposed SVD-based space vector modulation and other control algorithms can be shown in Fig. 7.

Maximum Feedforward Compensation Capability
As has been described in Section 2.2, the proposed ISVM can approach the output voltage at the spectra lower than the cut-off frequency of the filters. In other word, the proposed method is capable to suppress the low order harmonics within such spectrum band. One premise for this is that the modulation index has to be in the linear modulation zone. Given the definitions of αsv and θsc in (13) and (14), a conservative range for m is [0, 1] if sinusoidal and balanced output voltages are required. This means the maximum VTR in the example shown in the previous section is √ 3 2 cos ϕ i according to (16). It also means the maximum attainable space vector trajectory has to be within the inscribed circle of polygons formed by the used static vectors. Substituting the range of the modulation index m in (16) leads to the following condition, where | v i | min is the minimum amplitude of v i . For distorted input voltages, | v i | min might not be formulated explicitly, whereas for sinusoidal but unbalanced input voltages, it can be expressed as the subtraction of the positive and negative sequence components, i.e. | v i | min = V ip − V in . If the modulation index goes into the over-modulation zone, the output voltage is distorted even under ideal system input condition. However, the condition in (18) is also conservative. In the DSP implementation, a sentence of code is inserted to check whether or not the duty-cycle d 0 goes to negative, so that the linear-or over-modulation zone is detected.
Another premise for fully compensation is the accuracy of the input voltage measurement. According to (16), any filtering manipulation or inaccurately measurement on the input voltage will weaken the modulation compensation capability.

Flexibility in Switch State Selection and Commutation
Apart from two adjacent vectors, two nearest vectors with 120 • phase shift can also be used to synthesize the reference vectors in either the output hexagon or the input hexagon, as shown in Fig. 8. Take thatŪ is synthesized by two adjacent vectors whileV is made by the two nearest vectors with 120 • phase shift. The duty cycles for U can be calculated with (9), but forV (refer to the right hexagon in Fig. 8), equations in (10) are changed to:

Re
Here θsc belongs to (30 • , 90 • ). The duty-cycle dµ (= dµ + dγ ) in (19) is much larger than dµ in in (10). Therefore, using the nearest two vectors with 120 • phase shift in one hexagon can partly alleviate the narrow pulse problem. However, this method has a limit on the VTR range. Since the maximum length of the correspondingV decreases from √ 3 2 to 1/2, g d becomes m/2 according to (12). Substitute it in (15) and recalculate the result for the VTR, then the modulation index m to offset the input voltage is changed to, Similar to the case in Section 2.3, the SSMs in lines (1), (2) and columns 6 , 2 in Table 2, i.e. S abb , S aab , S bcc and S bbc are selected. The switches states Saac and Sacc of the four selected SSMs in the previous example are replaced by S bbc and S bcc in this case. Their duty cycles can be calculated accordingly, | vi| cos ϕi sin (αsv) sin (θsc) .
They have the similar forms as those in (13) if m is substituted by the value in (16). The complement duty-cycle for the T1SSe is given below, In a similar way, the switching sequence can be arranged as shown in Fig. 9(a). T1SS S bbb can be chose and placed in the switching sequence during d 0 , so that half of the double-sided switching pattern is S aab → S abb → S bbb → S bbc → S bcc . Given that all the duty cycles should be non-negative, the maximum VTR is cos ϕ i /2, with m ranging from 0 to 1. Likewise, the proposed SVD-based ISVM method can synthesize the reference vectorsŪ orV by using nearest three vectors as shown in Fig. 10(a), which is similar to the idea for back-to-back converters in [40,41] and leads to the same methods in [19]. Besides, the three vectors that are not the nearest vectors adjacent to the desired reference can be used, as shown in Fig. 10(b) and discussed in [37].

Comparison with Other Widely Used Modulation Methods
WhileŪ andV are responsible for regulating the directions of output voltage and input current space vectors, their lengths can take part in adjusting the amplitude of the output voltages, according to (12) and (15). When Ū is assumed constant, adjusting m and V results in the same effect of source side modulation in [28][29][30]. Similarly, adjusting m and Ū under the condition of constant V leads to the same as that in load side compensation [30][31][32][33]. If m, Ū and V are all tuned, the proposed method get the same method as in [34].
One major difference between the proposed and the existing ISVMs lies in the versatility on choosing the active hexagon. To compensate the input voltage abnormalities, the proposed ISVM can choose Ū in one sampling period while V in another, and vice versa [37]. But most existing methods in [28][29][30][31][32][33] modified only the switching functions in one side, either the rectifier side or the inverter side, in every sampling period. Another obvious difference is the proposed ISVM technique calculates the duty cycles using the measured input voltages rather than their decomposed components. This reduces the computation overhead since no decomposition on the input voltage space vector is required in this work. Furthermore, in terms of both the implementation and interpretation aspects, the proposed ISVM algorithm does not count upon the DC-link. This further simplifies the modulation process.
In other generalized modulation methods, the zero vector in [15] and the zero matrix in [16,42] and the translation matrix in [14], which are the different representations of duty cycle d 0 for the T1SS, are complex and difficult to be calculated. By contrast, the proposed method calculates the d 0 with less effort and determines the corresponding zero sequence voltage automatically by the SVM technique.

Experimental Results
In order to verify the effectiveness of the proposed ISVM algorithm, experimental tests are carried out on our laboratory prototype, as shown in Fig. 11. A three-phase inductor and a three-phase resistor are used as the inductive load for the MC. The system parameters are given in Table 3. For simplicity, the modulation strategy sets the input displacement factor to be unity. The distorted and unbalanced input voltages can be emulated by the three-phase programmable voltage source Chroma 61511. The ISVM algorithms are implemented in DSP to calculate the duty cycle for each selected active switch state. Such information will be transmitted via the external

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Another application is; in order to reduce the inrush current during motor startup or power on multiple UUT, the user can decrease the slew rate setting to achieve the objective.   [43]. For the case of distorted input phase voltage, two dominant harmonics are injected into the fundamental component of 110V root mean square (RMS) value. One is the 5th order positive sequence harmonic with 0.07pu amplitude, while the other is the 11th order negative sequence harmonic with 0.05pu amplitude. The waveforms of the input and output quantities when the modulation index m is set to be constant 0.9 are shown in Fig. 12(a) and Fig. 12(b). As can be seen, without compensation, the input distortion affects the output voltage synthesis, and thus distorts the output currents. In more detail, the FFT analysis for the output current I A is given in Fig.12(c). Significant inter-harmonic contents around 300Hz and 500Hz can be observed. By contrast, Fig. 13(a) and Fig. 13(b) show the waveforms of the input and output variables after the input distortion is compensated. The output currents in Fig. 13(b) are much more sinusoidal with less distortion than those in Fig. 12(b). The RMS value of the output voltage is set as 80V for fair comparisons. Further, the total harmonic distortion (THD) decreases from 6.21% to 4.00% after the compensation is actuated, as shown in Fig.  13(c). The inter-harmonics around the sideband of 300kHz have been suppressed.
For the case of unbalanced input phase voltages, the RMS value of phase "a" voltage is set to 121V (10% higher than the other phases of 110V RMS), while the output voltages maintain as 80V RMS. The waveforms of the input quantities are shown in Fig. 14   those at the output side under two working conditions, i.e. with and without feedforward compensation, are shown in Fig. 15(a) and Fig.  15(b) respectively. The proposed ISVM method with feedforward compensation reduces the THD content to 3.32%, whereas that in the standard ISVM method without feedforward capacity is 5.18%. Also, the fundamental components of the three phase output currents are 2.14A, 2.20A and 2.18A, which means the output currents are balanced. Thus, the output current waveforms when the input unbalance is compensated are much smoother and have less THD than those when the input unbalance is uncompensated.
In both cases, the proposed SVD-based ISVM technique is able to offset the variations of the input voltages and keep the output currents sinusoidal and balanced. Such compensation is achieved by varying the modulation index according to the measured input voltages, as shown in Fig. 16. The THD contents of the A-phase output current I A with and without compensation operating under ideal, distorted or unbalanced input voltages are summarized in Table 4. In ideal scenarios when the input voltages are sinusoidal and balanced, both the input and output currents meet the quality requirements of IEEE Standard 519 [48]. In all conditions, the proposed ISVM has better output performance when the feedforward compensation capability is activated than not. However, if the input voltages are distorted or unbalanced the input currents will obviously become distorted. In such scenarios either the input or the output performance can be maintained leading to a sacrifice in the performance at the other side of the converter. It is worth noting that the input currents will be inevitably distorted if the output performance has a higher priority than that of the input side. This can be seen in Fig. 12(a), Fig. 13(a), Fig. 14(b) and Fig. 14(c), where the input current quality is slightly worse when the input voltages are compensated than those without compensation. Such phenomenon is intrinsically determined by the lack of energy storage elements in  Phase "a" Input Current 200V/div, 5ms/div 5A/div, 5ms/div (c) Fig. 14: The waveforms of the input side quantities: (a) three unbalanced input phase voltages, (b) the source current Ia when the input imbalance is uncompensated, (c) the source current Ia when the input imbalance is compensated. matrix converters and the instantaneous active power balance theory [47]. Additional effort in hardware or software can change this compromise [44][45][46][47], but these are beyond the scope of this paper.
The proposed method has similar performance under other abnormal supply conditions, like sags, surges, and thus the corresponding results are not shown here.   By setting a counter in the program, the maximum execution time in our DSP platform is 83.0µs, which is almost the same as that for the traditional ISVM without compensating the abnormal input voltages, 82.8µs.

Conclusions
This paper has presented a new indirect space vector modulation (SVM) with feedforward compensation mechanism for both the direct and indirect matrix converters. The singular value decomposition (SVD) technique is applied on the switch states to reveal the intrinsic features of matrix converters. A duty-cycle matrix is then constructed using the SVD results of switch states. The SVD also renders the switch states and the modulation process a geometrical interpretation between the system input and output vectors. To implement the proposed modulation construction, the space vector synthesis technique is subsequently utilized to select a series of switch states and calculate their duty cycles in a simple way. By including the instantaneous input voltages in the calculations, the duty cycles are adjusted on-line to counteract the undesirable effects caused by abnormal input voltages to keep the output currents sinusoidal and balanced. Combining SVD and SVM provides the modulation process of matrix converters a geometrical visualization, and hence a measure not only to revisit the existing modulation methods but also to design new ones. Moreover, it provides a flexibility in terms of switching state selection, duty-cycle calculation and switching sequence arrangement, making the modulation easy to understand and implement. The experimental results have been shown to substantiate the claims above.