New Reduced Asymmetric Basic Module Multilevel Converters for Cascaded Configurations

Requiring a high number of power switches and their rating are the main limitations of multilevel converters in medium-voltage applications. The main objective of this paper is, introduce a reduced asymmetric basic module (RABM) for cascaded multilevel converters that require a less number of power switches and a lower total blocking voltage value in competition with other multilevel converter topologies. The proposed module comprises eight half-bridge converters that are connected in different ways to generate 63-level. The comparison results among the proposed module and other multilevel converters show that proposed module can generate a large number of levels with keeping constant the number of power switches. The simulation outcomes confirm the performance of the proposed module in both symmetric and asymmetric operation modes.


I. INTRODUCTION
M ULTI-LEVEL converters (MLC) are applied in medium-voltage applications due to low total harmonics distortion (THD), reduce the voltage rating by the power switches (cause of use a high number of power switches), no require LC filter (when a large number voltage levels is available) and so on. They use in applications such as flexible AC power transmission systems (FACTS), renewable energy sources, AC motor drives etc, [1]- [3]. Neutral-point clamped (NPC), flying-capacitor (FC) and cascaded H-bridge (CHB) multilevel convertrs are the three well-known topologies in industrial [4]- [6]. In the NPC-MLC clamping diodes act to limit the voltage stress of power switches and similarity in the FC-MLC, flying capacitors is used to limit the voltage instead of diodes. Therefore, in order to achieve a large number of levels the NPC and FC multilevel converters need a large number of the diodes and capacitors, respectively. The CHB-MLC, which is a modular topology, consits of n Hbrdige converters which they connect as series to generate a large number of levels. Therefore, CHB-MLC requires many switches and isolated DC sources than NPC and FC converters [7].
Generally, there are two configurations for cascaded multilevel converters: symmetric and asymmetrical. In an symmetric multilevel converter like as symmetric CHB-MLC the different voltages of DC sources have a same magnitude. The power circuit of an asymmetric is the same with a symmetric topology and only DC source voltage magnitudes are difference. Therefore, using different DC source magnitudes and a proper switching modulation, the output voltage is increased [8], [9]. In this paper, the authors identified that by increasing the number of output voltage levels in multilevel inverters, the number of DC sources/capacitors and switches increases rapidly and the control of capacitor voltages will be harder. Recently, various approaches have been proposed to solve this issue [10]- [16]. A symmetric and asymmetric MLC has been presented in [12]- [14] to solve the high number of switches problem. An asymmetric MLC has been reported in [15] that it focused on reducing the number of power switches. In [16], an asymmetric MLC has been developed that reduced the total standing voltage and the number of power switches.
The aim of this study is introduce a new asymmetric basic module for cascaded multilevel converters with less number of switching devices. The proposed structure generates 63 voltage levels with six input DC sources and sixteen power switches. In additional a cascaded connection is introduced with n numbers of the reduced asymmetric basic module. The proposed cascaded MLC is investigated based on symmetric and asymmetric modes to compare other generalized cascaded multilevel converters. To show the capability of the output waveform and THD magnitude of load voltage and current, the proposed asymmetric reduced basic module is simulated.
The architecture of the suggested reduced asymmetric basic module multilevel converter (RABM-MLC) which can create 63-level is shown in Fig. 1. The suggested basic module is made up of sixteen unidirectional switches from type of insulated gate transistors (IGBTs) with their respective antiparallel diode that will be directly polarized in some convert operating modes.
The proposed RABM-MLC has been designed based on eight half-bridge converter that can create different paths by crossing to DC sources. We chosen the half-bridge converter for developing of the proposed RABM-MLC because it is one of the most feasible converter that can convert energy with high-quality with two unidirectional power switches and one Therefore, the proposed RABM-MLC can generate 31 positive and 31 negative levels with magnitudes ±V 1 , ±V 2 , · · · , ±(V 1 + V 2 + V 3 + V 4 + V 5 ) and zero level.

B. Operation Modes
The RABM-MLC has various operating modes that are generated by the activation of the different switching devices. In Fig. 1, if the switchesT 1 ,S 3 ,S 6 are turned on the output voltage is v o = 0, as well as ifT 2 , S 3 , S 6 are turned on, so the output voltage is zero, too.
If the switches S 1 ,S 2 , S 3 ,S 6 ,T 1 , are turned on, whereas If the switches S 1 , S 2 , S 3 ,S 6 ,T 1 , are turned on, whereas Similarly, the remaining levels are obtained, Table I gives the synthesis of the state of the switches to generate each level, where the 64 switching states are shown by the on switches. As can see in Table I, the switches T 1 andT 1 generate the positive voltages levels for half cycle and T 2 andT 2 obtain the negative voltages levels for half cycle.

C. Total Standing Voltage Calculation
Another parameter that is evaluated in multilevel converters is the maximum standing voltage on the power switches. If the value of the standing voltage is reduced, the converter's Number of Levels 10n + 1 62n + 1 63 n total cost will also decrease. On the other hand, this quantity is important in determining the rating of power switches to generate desired levels. This parameter is equal to the sum of the standing voltage on the switches in a different switching mode as follows: The standing voltage on each switching device is: By substituting (7) to (14) into (6), the magnitude of T SV is obtained as:

D. Proposed Cascaded Multilevel converter
In order to minimize the number of components, a cascaded structure is developed based on the cascaded connection of the proposed multilevel converter. Fig. 2 shows the cascaded connection of the proposed multilevel converter with n number of the proposed basic topology.
In the proposed cascaded topology, the maximum output voltage and the number of output levels are obtained based on the value set for DC sources magnitudes. If the values of DC sources are equal in all units, the implementation of resources in the converter is symmetric operation mode. Otherwise, it is called asymmetric mode. Table III gives the details of a symmetric mode (M1) and two proposed asymmetric modes    [14] R7 6(N L − 1)/5] + 3 6(N L − 1) The study shows that the magnitudes of DC sources are different in all proposed modes except for M1 that it is a symmetric mode.

III. COMPARISON THE PROPOSED ASYMMETRIC CASCADED MLI WITH TYPICAL CASCADED MLIS
In this section a comprehensive comparison is discussed in order to study the behaviour of the proposed cascaded multilevel converter with other presented cascaded MLC [10]- [16]. The comparison includes the number of switches, IGBTs, DC power supplies and the maximum total standing voltage of the power switches. In this comparison, in the proposed multilevel converter three operation modes are applied where presented in the previous section to determine the DC sources magnitudes. The operation modes of the comparison cascaded multilevel converters presented in [10]- [16] are given in Table  IV. Figs. 3 presents the comparison among the proposed cascaded multilevel converter and others cascaded converters. M3 are considered. Among the presented topologies under this comparison, the presented MLCs in [15], [16] use bidirectional switches in their architectures so they require two IGBTs in each switch. Therefore, a comparison is done in term of the number of levels versus IGBTs among the proposal and other presented MLIs. Fig. 3(b) illustrates the variation between the levels quantity and the number of IGBTs for all the presented cascaded MLCs and proposed MLC. As one can see, the generated levels by the proposal are higher than other MLCs with the same number of IGBTs. Fig. 3(c) presents the variation between the number of levels and the required DC power supplies for all presented topologies and the proposal MLI. From this figure and considering the proposed M 3, the proposed MLI requires low DC power supplies to generate the same voltage levels except CHB (R2) that the proposed MLC has a same value with that. For example, the proposed topology generates more than 125-level with six DC sources in third operation mode M3 and another topologies generate this level with more than six DC sources. Fig. 3(d) presents the relation of the total standing voltage (per unit) versus the levels in all presented topologies and the proposed RABM-MLC topology. The value of TSV in all presented cascade MLCs have a same value for the presented all methods and it has a different value for the two magnitudes methods presented MLIs in [11], [12], [14]. According to Fig.  3(d), the proposed MLI has decreased the value of the TSV compared to other MLCs for producing the same number of levels.

IV. SIMULATION RESULTS
In order to confirm the performance of the proposed topology, the simulation of the sixty-three level is performed by MATLAB/Simulink. The simulation results of the proposed 63-level basic module is evaluated. The simulation results are tested under pure resistant and resistive-inductive loads with power factor 0.8 (144Ω, 460mH) and 50Hz frequency.
In this simulation, the fundamental frequency or staircase modulation is applied to the proposed 63-level. The main goal of choosing the fundamental frequency modulation is its low switching frequency that leads to low switching losses. This modulation used a sinusoidal waveform with the fundamental frequency of 50Hz that is the desired voltage in the output. The switching pulses are determined separately based on the switching states.
The proposed RABM-MLC consists of 16 power switches and six DC sources. In order to achieve 63-level, the binary algorithm (1:2:4:8:16) are used for magnitudes of six DC sources. Therefore, the values of DC sources are V 1 = 20V , The simulation results of 63-level basic module under two different loads type are shown in Fig. 4. Fig. 4(a) shows the load voltage and current for a resistance load R = 144 Ω which is 63-level staircase waveform with the maximum peak value of 620V . Fig. 4(b) presents the load voltage and current for a resistive-inductive load with power factor 0.8, R = 144 Ω, L = 460 mH.
The magnitudes of THD for load voltage is presented in Fig. 4(c). As you seen, all harmonic orders have a very low percentage less than 0.5%. Corresponding to IEEE-519 standard the magnitude of maximum THD% is 8%. Therefore, the output of proposed RABM-MLC does not require any LC filter. Fig. 4(d) presents the magnitudes of THD for load current. The magnitudes of THD for load current equal to 0.04% that load current is almost a sinusoidal waveform because the used RL load acts as a low-pass filter at the output of converter. Fig. 5 shows the load voltage of proposed RABM-MLC in zoom state. As can seen, the 31 positive voltages and 31 negative voltages and zero level have been generated by proposed converter with 20V voltage steps from the maximum positive value +620V up to the maximum negative -620V .

V. CONCLUSION
In this study, we have presented a new asymmetric topology of multilevel configurations which it requires to less number of power switches. The proposed asymmetric basic module multilevel converter generates a sixty-three level with sixteen power switches and six DC sources. The proposed topology was extended to cascaded multilevel topologies with different DC source magnitudes to creates more levels.
The most achievements of the proposed topology were reduced number of switching devices and maximum blocking voltage on power switches so that based presented comparison study the proposed cascaded multilevel created a large number of levels than other topologies by using the same number of switching devices. Our work clearly has some limitations such as the proposed topology required a lot of DC source. For example, in a cascaded H-bridge multilevel converter to generate 63-level with considering a binary algorithm for DC source magnitude it requires 20 power switches and 5 DC sources but the proposed topology to generate the same level reduces the power switch to16 with one extra DC source.
Despite this, we believe our work could be a proper topology due to the reduced number of switches for asymmetric configurations in applications such as AC motor drives. The proposed 63-level asymmetric module multilevel inverter was tested in different load types. The simulation results have shown that the proposal can work in different power factors and reduce the magnitude of THD as well as the number of switching devices.