Real-Time Implicit Model Predictive Control for 3-phase VSI

This paper deals with the real time implementation of an Implicit Model Predictive Control strategy applied to a 3-phase Voltage Source Inverter (VSI) in stand-alone applications. Solving the optimization problem online with a sufficiently short sampling time allows to directly control the output voltage while respecting the desired constraints. Due to the resulting complex calculations and the related time-constraints, the implementation has been carried out on an industrial-grade FPGA to take advantage of the true parallel execution capabilities.


INTRODUCTION
Model Predictive Control (MPC) is a powerful and elegant way to regulate dynamic systems subject to physical constraints. It uses a system model to predict the evolution of system states in the future. The optimal control action is then selected minimizing a cost function. For linear systems with quadratic cost function and linear constraints, the control approach results in solving a Quadratic Programming (QP) at each sample time [1]. With the increase of system states and prediction horizon, however, the problem becomes highly computational demanding to be solved in real time. For this reason, initially, MPC has been mainly applied to chemical and industrial process with low sampling rates. During the last decade, an explicit MPC formulation has been proposed to overcome this limitation. This solution consists in reformulating the MPC problem as a multiparametric program that is solved offline for all possible states, resulting in a lookup table giving the optimal solution as a function of the current state [2]. With this approach, the online computation is drastically reduced at the expense of an increased memory requirement to store the lookup table. The method has been successfully applied to both power converters and drives applications [3]- [4]. In recent years, the increasing computational power of electronic devices, especially Field Programmable Gate Arrays (FPGA), has permitted to extend the use of MPC technology also to higher sampling frequency systems, such as power converters. The intrinsic finite number of possible control actions of power converters has recently suggested the MPC variant, called Finite Control Set MPC (FCS-MPC) [5]. In this strategy the system state is predicted for every possible converter configuration and the one resulting in the minimum cost function is selected as optimal. The approach has been successfully applied to different power converter topologies, such as shunt active filters [6], matrix converters [7] and drive systems [8]. The method is promising, but the exponential growth of the possible control action imposes the use of a prediction horizon usually smaller than four. Moreover, applying a single voltage vector at each sampling time, as well as implying a variable switching frequency, increases the ripple on the output voltages and currents. The last step forward to find the optimal control action in power electronics applications, exploiting the full capabilities of MPC, is the fulfillment of the implicit MPC, which entails the implementation at the high sample rates required by such systems. An evidence of its effectiveness has already been provided in [9], where simulation results show the output voltage control of a VSI with LC filter achieved using an efficient modified Active Set technique. However, this method is limited to work only with a single step of prediction and it has not been really implemented on a control board. This paper presents an implicit MPC applied to a three-phase two-level inverter with LC filter for off-grid applications. The optimization problem is solved online in real time on a FPGA using the Active Set method, and the output of the predictive algorithm is used as the modulating signal for a pulse width modulator. It is well known that controlling the inverter output voltages increases the whole system complexity and order, and the MPC approach is considered particularly suitable to overcome this issue. Simulation and preliminary implementation results are reported to analyze the control scheme and to prove the effectiveness of the method.

II.
SYSTEM MODEL As previously stated, the MPC algorithm has been applied to a two-level grid connected voltage source inverter with an output LC filter, depicted in Figure 1. The converter is fed by a constant DC voltage source and the unknown load in the MPC algorithm has been modeled considering its drained current (ia), which is kept constant along the prediction horizon. The plant average model in the dq-reference frame, which is required by the MPC algorithm to predict the future state of the system in order to choose the optimal control action, is characterized by the equations shown in (1).
Where ii is the inductor current, vc is the output capacitor voltage, vi is the inverter voltage and ωel is the AC angular frequency. Furthermore, R, L, C are the output LC filter resistance, inductance and capacitance, respectively. The corresponding state space representation is shown in (2), where the system state has been augmented to include the load current components. In this application, it is supposed that at each sampling instant it is possible to measure the whole state of the system (x).
The continuous-time system model has been discretized using the well-known Zero-Order Hold (ZOH) method, leading to a state space representation with Ad, Bd and Cd matrices, which are provided to the MPC algorithm.

III. PROPOSED CONTROL STRATEGY
The algorithm proposed in this paper aims to control the output voltage of a three-phase Voltage Source Inverter, managing the right amount of power which is required by the loads. Such a system usually works at constant voltage reference and it must be able to fast compensate all the load variations. The described control strategy is based on the implicit MPC technique. The first task performed by the algorithm consists in the evaluation of the effects due to the control action which was just applied in order to compensate the computational delay. In fact, in the proposed strategy there is a delay equal to a sampling period (Tsp) between the sampling and the actuation of the control action. The change of the system state during this period must be taken into account and this can be simply done by using the discrete model to evaluate the state at the k-instant starting from the measured values. The plant state is then predicted in the future for a certain number of steps, which corresponds to the prediction horizon (Hp). During this calculation, it is assumed that the control action can be changed for a number of steps equal to the control horizon (Hu), which is obviously lower than or equal to the prediction horizon. As a result, the possibility of selecting different prediction and control horizons provides two degrees of freedom to influence the complete control dynamic and performance. In fact, it can be noticed that choosing Hp greater than Hu penalizes the changes in the control action, providing a stabilizing effect to the system. A quadratic cost function (J), shown in (3), is then minimized with the aim of finding the optimal control action. The first summation considers the difference between the output (y) and its reference (r) weighted with ̃ while the second summation penalizes input changes (Δu(k)=u(k)-u(k-1)) weighted with ̃.
As can be seen in the expression of Q(i), each quadratic error is weighted with a coefficient (Wid, Wvd, Wiq, Wvq), which can be selected to change the behavior of the algorithm by increasing or decreasing the priority of the control of a quantity over another. In this particular application, being the voltages across the capacitors the goal of the control algorithm, the weights associated to the dq-axes currents have been set to zero. Analogously, in order not to penalize the dynamic performance of the control, the weights associated with the change of the control actions (WΔvid, WΔviq) have been set to zero.
The minimization of the cost function can be written as shown in equation (4), which corresponds to a quadratic programming (QP) problem. α and β are the matrices associated to the linear constraints required to define the desired maximum and minimum values of U(k) and Y(k). The constraints on U(k) are written in the form of equation (6) In order to obtain α and β, the equations related to the constraints on U(k) and Y(k) must be modified by expressing the relations as functions of ΔU(k) (8). Π1 contains only the first two columns of Π.
Given the small number of variables, the technique which seems to perform better for the solution of the inequality constrained QP problem of equation (4) on a FPGA device is the Active Set method [10]. The implementation has been carried out using the LU decomposition to efficiently solve the linear systems associated with the equality constrained QP problems which must be solved to obtain the final solution [11].
It is important to note that, at the end of each algorithm execution, only the first control action Δu(k) is actually applied, while the remaining (Hu -1) are deleted and they will be entirely recalculated at the following iteration. The obtained Δu(k) is then added to u(k-1) and the resulting u(k) is sent to a PWM modulator to control the converter switches, ensuring a constant switching frequency.

IV. SIMULATION RESULTS
Preliminary results have been achieved by an accurate simulation model, where the effects of the real implementation, such as the computational delay, have been included. The parameters which have been used are shown in Table I. The effectiveness and the performances of the proposed strategy are shown in the following figures. Figure 2 illustrates the behavior of the control algorithm in steady state condition with a resistive load equal to 10 Ω on each phase, wye connected. Figure 3 shows the effectiveness of the proposed strategy during a load step from 10 Ω to 20 Ω on each phase, wye connected. Figure  4 displays a significant load step variation from 10 Ω on each phase to a no-load condition. Finally, Figure 5 shows the efficacy of the current limitation and its effects on the dynamic behavior of the control action during a voltage reference step.     The control board used to achieve the experimental results, where the proposed control algorithm is implemented, is shown in Figure 6 (PED-Board®). PED-Board, which is based on the National Instruments System-on-Module sbRIO-9651, has been designed with dedicated peripherals specifically for power electronics and drives applications. NI sbRIO-9651 has a dualcore ARM processor and an Artix7 FPGA. FPGA manages the on-board ADCs, resolver, PWM unit and scheduler, CAN-bus communication and DACs interface. The Real-Time target (i.e. the ARM micro-processor) manages the whole external communication structure forwarding and sending/receiving the corresponding commands and data to/from the FPGA. The algorithm implementation on the industrial grade FPGA target takes the benefits from using the well-known LabVIEW graphical development environment. It is time effective and exhibits a high efficiency in generating the low-level code. FPGA space occupancy, reported in Table II, corresponds to a preliminary implementation of the control algorithm with 2 step-ahead prediction and 32-bit single precision floating-point arithmetic. Figure 7 illustrates the MOSFET inverter based on SiC devices used to carry out the experimental verification of the proposed control algorithm.  A scheme of the implemented algorithm is shown in Figure 8, where the tasks entirely executed by the FPGA are highlighted. Figure 8. Scheme of the algorithm implemented on the FPGA target.
As previously described, after the measurement of the required quantities and the definition of the discrete system model, the optimization problem is formulated in the form of a QP problem with inequality constraints, which is solved using the Active Set method. This technique breaks up the initial problem with inequality constraints into simpler problems characterized by equality constraints. Each equality constrained problem, after an appropriate matrices definition, implies the resolution of a linear system. This task is efficiently achieved by decomposing the matrices using the LU technique.
It is important to note that LabVIEW FPGA does not support the use of two-dimensional matrices, which have been stored using one-dimensional vectors. In order to reduce the computational burden needed to index the required matrices elements, the vectors have been stored concatenating the columns of the initial matrices. Furthermore, the Active Set method natively uses variable-sized matrices, and this is not possible on the FPGA (i.e. FPGA does not support variable length arrays). For this reason, the QP solver has been designed to support the maximum possible size of the matrices involved in the calculations, and the actual number of elements is a parameter which can be different at each iteration.

CONCLUSIONS
In this paper, a powerful and effective strategy based on a real time implementation of the implicit MPC for the control of a 3phase VSI with output LC filter for stand-alone applications has been presented. Simulations results show the effectiveness of the proposed algorithm to regulate the output capacitor voltages while respecting the imposed constraints on filter currents during both steady state condition and load changes. Preliminary implementation results on an industrial grade FPGA also demonstrate the feasibility of such demanding real time implementation. Future steps involve certainly the cosimulation of the realized FPGA code with a time-synchronized platform for the power electronics part such as NI-Multisim.
After that, hardware-in-the-loop verification can be accomplished before starting the experimental campaign.