Disturbance-Observer Assisted Controller for Stand-Alone Four-Leg Voltage Source Inverter

In this paper, a newly disturbance-observer based control strategy for stand-alone four-leg VSI has been proposed and analyzed. The disturbance-observer operates together with a simple and effective resonant controller in order to regulate the inverter output voltage. In particular, the resonant controller regulates the output voltage fundamental harmonic, whereas the disturbance observer is designed for compensating output voltage harmonics when non-linear loads have to be fed. The new control strategy effectiveness and performance have been validated at first through a full MATLAB/Simulink model and then by experimental results on a dedicated 40 kVA three-phase 4-leg.


I. INTRODUCTION
The harmonic content reduction of the current and voltage waveforms at the converters' output is one of the fundamental objectives of research activities in power electronics. Many international standards, such as EN-50160 and EMC EN-61000, must be satisfied [1]. Consequently, the performances of voltage and current regulators play an important role in the modern applications of the power electronics. Regarding the four-leg Voltage Source Inverter (4L VSI), several control strategies have been investigated in literature [2]- [8].
As fully explained in [2], a possible implementation of the regulators is based on resonant controllers. Where, one of the resonant controllers is tuned at the fundamental frequency for the output voltage regulation, while the other several is required for compensating the harmonics induced by the non-linear load, such that the total harmonic distortion (THD) of the output voltage can be minimized. The advanced online tuning method is proposed in [2] for making the resonant controllers more adapted to the load variations.
Instead of using several resonant controllers, it is also possible to reduce all the periodic harmonics using a repetitive controller as in [3] and [4]. Where, the repetitive controller works only on the harmonics suppression to supplement the conventional feedback controller.
Taking the advantages of the both, the authors in [5] have combined a repetitive controller and a resonant controller, such that the reference voltage can be tracked with zero phase shift by the resonant controller, whereas the repetitive controller will fine regulate the output voltage till its THD is minimized.
Moreover, since the harmonics can be modelled as disturbances, disturbance-observer can also be used as a supplement to the feedback controller as in [6]. Interestingly, the authors in [7] have pointed out the similarity between the repetitive controller and the feed-forward disturbanceobserver. On one hand, the new repetitive-controller-like disturbance-observer designed in [7] can work as a traditional repetitive controller for reducing periodic harmonics, but larger stability margin can be achieved without sacrificing its performance. On the other hand, this new disturbance-observer can be tuned as a conventional disturbance-observer. That is, following the separation principle, it can be tuned separately to the feedback controller.
Hence, this paper applies the new repetitive-controllerlike Disturbance-Observer (DO) to stand-alone 4L VSI for the first time. The block scheme of the proposed new control strategy is shown in Fig. 1.
As it can be seen from Fig. 1, the regulator of the inverter control consists of a Resonant Controller (RC) plus the DO. Where, the RC is designed at the fundamental frequency for reference voltage tracking, while the DO should learn and cancel any periodic harmonics produced by the non-linearity of the inverter and the non-linear/unbalanced load. In the following, Section II deals with the inverter topology and output filter description. The proposed control strategy has been discussed in Section III. Then, the simulation and experimental results using the 40kVA 4L VSI prototype is presented in Section IV. Finally, the paper is concluded in Section V.

II. 4L VSI TOPOLOGY AND OUTPUT FILTER DESCRIPTION
In many microgrids applications, the trend is to eliminate the output transformer in order to improve the costs, size and weight. When the transformers are not used in the output inverter and the currents flowing through the three-phase loads are not balanced, it is necessary to implement an alternative connection for the neutral terminal. The neutral terminal of the inverter can be connected in two different modes, called respectively three-phase four-wire inverter and three-phase four-leg inverter [8]- [9]. In the three-phase four-wire inverter the neutral point is connected to the split dc-bus capacitors [9], as shown in Fig. 2. In the three-phase four-leg inverter the middle-point of the added leg is directly connected to the neutral terminal. The three-phase 4L VSI topology is depicted in Fig. 3. On one hand the three-phase four-wire inverter is certainly the easiest solution, on the other hand it presents some problems. The first issue is the voltage unbalancing among the series connected DC-link capacitors. Furthermore, due to the deterioration of the harmonic content in the phase-to-neutral voltage, the sinusoidal PWM with third harmonic injection and vector machine techniques cannot be applied to the three-phase four-wire inverter. The three-phase four-leg inverter allows to overcome the mentioned problems; however, extra driving circuits are required due to the increased number of switches and power diodes. Considering the first-order approximation, the transfer function (TF) of the three-phase 4L VSI can be written as in (1), where VBUS is the DC-bus voltage, k is the factor depending on the modulation strategy and fsw is the switching frequency. Using the sinusoidal PWM with third harmonic injection, the k factor is equal to 0.57.
The prototype of the three-phase 4L VSI is depicted in Fig. 4. It is possible to recognize the DC-bus side, the driver circuit control board, the adapter board, the control board and the three-phase terminals A, B, C, as well as the neutral terminal n. Each leg is realized by the SEMIX module (SEMIX303GB12Vs) 300A-1200V rated. The rated power is 40kVA, line-to-line voltage VLL=400V, switching frequency fsw=12kHz, DC-bus voltage VBUS=750V and efficiency at the rated power is about 97%. In order to remove the switching component from the output voltage and current waveforms, an appropriate output filter has been realized. The circuit diagram of the single-phase output filter is shown in Fig. 5. It can be seen from Fig. 5 that the main filter Lf, Cf is connected to the selective damper (Rd, Ld, Cd) and trap (Rf, Lf, Cf) branches. In order to properly damp the main filter resonance peak, the frequency of the damper branch is centered at 1.2 times of the resonance frequency of the main filter LfCf. Consequently, the resistor Rd is visible to the rest of the circuit only in limited range of frequency. The fundamental switching component is short-circuited by appropriately tuning of the trap branch, Rf, Lf, Cf. According to the filter design shown in [10], the optimized parameters of the output power filter are listed in Table I. Performing some algebraic manipulations, the TF of the output filter can be derived as in (2).
( ) The TF coefficients of the output power filter are listed below.

III. PROPOSED CONTROL STRAGETY
The aim of the inverter control strategy is to obtain as much as possible sinusoidal waveform of the output voltage even in case of non-linear and unbalanced loads. The simplified block diagram to be used for tuning the voltage control loop is shown in Fig. 6, where it is possible to identify the following transfer functions: G4L(s) is the TF of the inverter (1), GF(s) is the TF of the output power filter (2), Glf(s) is the TF of the second-order low-pass Butterworth filter in the measurement chain, GRC(z) and GDO(z) are the TFs in the discrete domain of the resonant controller and of the disturbance-observer, respectively. The coefficient kgain is the gain equal to 1/(k·VBUS), where k is the factor defined above. dph is the modulating signal which is then compared with the carrier to generate the gate signals. The TF of the second-order low-pass Butterworth filter Glf(s) is defined in (3), where f is filter cut-off frequency.
The RC is designed and tuned at 50 Hz in order to obtain an excellent output dynamic response and good stability margin of the system. The DO is used to compensate all the harmonics above the fundamental.

A. Resonant Controller
There are different analytical forms of the RC, i.e. ideal form, approximated form and real form with or without phase compensation [2]. In this case, the only task of the RC is to compensate the fundamental harmonic of the output voltage. For this reason, the real form of the RC without phase compensation is chosen (i.e. filter effects are negligible at the fundamental frequency) [11], [12]. The TF of the selected RC is given in (4), where kir is the gain, cr is the width and 0 is the resonance frequency.
Taking into account that ωcr<<ω0, the magnitude of the RC at the resonance frequency is given in (5), whereas the phase of the RC cannot be used as a design parameter, since it is locked at 0° at the resonance frequency.

B. Disturbance-Observer
The DO proposed in [7] can be designed starting from the state-space model of the disturbance D(z). Assuming the disturbance D(z) as a periodic behavior, its dynamical model can be expressed as in (8), where Xd is the disturbance state vector, a33 and cd, are the matrix and the vector defined in (9). The disturbance vector Xd has N=fs/f0 elements, where fs is the sampling frequency and f0 is the fundamental frequency. D(k) is the instantaneous disturbance at tk.
Overall, equations (8) and (9) Thus, the observer for this disturbance during the k th sampling interval can be derived as in (10), where UDO(k) is the "equivalent measurement" of the disturbance, which equals the difference between the direct measured output voltage kgain·Vph at tk and the intended modulating voltage signal dph required to be reached at tk. L is a vector of N observer gains L=[L1, L2,..,LN]. X d is the estimated disturbance state vector. cdX d(k) denotes the estimated disturbance at tk. A is the ratio between the "indirect measured" disturbance at tk and the estimated disturbance at the same time. Qf is the output matrix for the observer.

X (k + 1) a X (k) L c X (k) Q X (k + 1)
Based on equation (10), Fig. 7 shows the block diagram of the DO. According to [7], thanks to the following three settings, the DO is able to attenuate periodic harmonics in the same way as a traditional repetitive controller.
1. The matrix a33 is updated into a 33 in order to include the forgetting factor Q of the traditional repetitive controller.
3. The output matrix Qf is functionally the stability filter that is commonly included in the repetitive controller for compensating any system delay seen by the repetitive controller. For the DO, Qf is a 1×N matrix with all zeros but the i th element equals one, where i is the total number of delays between the output YDO and the corresponding UDO becomes available in the feedback.

A. Simulation Results
The converter full digital-switching model has been realized in the Matlab/Simulink environment in order to validate the performances of the new control strategy. Preliminary results have been performed with reference to the system parameters listed in Table II. The output matrix Qf of the observer is chosen according to the system delay and it is defined as Qf =[0 0 0 1 ··· N]. Fig. 8 and Fig. 9 show the phase-to-neutral output voltages VAn, VBn, VCn and the related currents IAn, IBn, ICn in case of resistive load when the DO is engaged or disabled (i.e. RC only). It possible recognize in Fig. 8 that the output voltages and currents are distorted during the zero-crossing due to the dead-time, mainly 5 th and 7 th harmonics. The dead-time is fully compensated when the DO is enabled as depicted in Fig. 9.  Considering the non-linear load as a three-phase diode bridge rectifier having the parameters shown in Fig. 10; Fig.  11, Fig. 12 and Fig. 13 show the phase-to-neutral output voltages VAn, VBn, VCn and the currents IAn, IBn, ICn when the DO is disabled and enabled, respectively. As it can be seen in Fig. 9 and Fig. 13, the combined RC-DO allows to compensate the harmonics of the output voltage.

B. Experimental Results
The experimental tests have been performed in order to support the proposed control strategy. The inverter depicted in Fig. 4 is controlled by the National Instruments Systemon-Module sbRIO-9651 with a dedicated board specifically designed for power electronics and drives applications, as described in [13]. The inverter control algorithm has been implemented in LabVIEW environment on the FPGA target. According to the operating condition listed in Table II, Fig. 14 shows the phase-to-neutral output voltages VAn, VBn and the phase current IAn, under no load condition. Fig. 15 illustrates the phase-to-neutral output voltages VAn, VBn and the phase current IAn, in the case that one of the three phases is loaded at 1 kW and the other phases are at no-load condition. Finally, Fig. 16 shows the phase-to-neutral output voltages VAn, VBn and the phase current IAn, considering the unbalanced load having the parameters depicted in Fig. 10. In order to evaluate the computational effort of the control algorithm, the execution time of the control structure has been evaluated on the FPGA resulting about 10 μs.

V. CONCLUSION
A resonant controller assisted by a disturbance-observer control strategy for stand-alone 4L VSI has been illustrated. The use of a resonant controller to compensate the fundamental frequency of the output voltages provides an excellent tracking capability jointly with an effective FPGA implementation. Furthermore, the disturbance-observer designed to compensate higher order harmonics allows to strongly reduce the output voltage THD, with an efficient computational effort. According to the simulations and experimental results, the proposed control strategy exhibits very interesting performances.