Study of a Silicon Carbide MOSFET Power Module to Establish the Benefits of Adding Anti-parallel Schottky Diodes

The majority of commercial Silicon Carbide (SiC) MOSFET based power modules available on the market today also include SiC Schottky diodes placed in anti-parallel with the MOSFETs. Using an accurate electrical and thermal simulation model this paper analyses the difference between two power modules; one with anti-parallel SiC Schottky diodes and one without for different load conditions in a specific drive application. The main objective of this paper is to explain the advantages and disadvantages of using anti-parallel SiC Schottky diodes with SiC MOSFETs. Experimental results are also presented to validate the simulation results.


INTRODUCTION
In the recent years 1.2kV Silicon Carbide (SiC) MOSFET devices have become readily available. Such devices can replace traditional IGBTs commonly used in drive applications and other converter topologies. There are several published studies that seek to evaluate the performance of SiC devices against IGBTs for use in drive applications [1,2], matrix converters [3,4], DC/DC converters [5][6][7][8] and active rectifiers [5,9]. In other studies more generic comparisons are evaluated [5,10]. The performance of SiC MOSFETs has also been reviewed for high temperature applications [11].
Currently SiC MOSFET devices are more expensive than conventional IGBTs, but they can offer several advantages including:  Higher switching frequencies can be achieved. This allows a reduction in the physical size of magnetic components used in the input/output filter, which in turn reduces the volume and increases the power density of the converter [3].  SiC MOSFETs have lower losses compared to IGBTs (at a given switching frequency); hence converter efficiency can be drastically improved. As a result the capacity and cost of the cooling system is reduced, which also improves the power density of the converter [10].  A compromise between the previous two points to reduce overall volume and improve the efficiency. SiC MOSFETs are available from various manufacturers in three different forms: as discrete components, power modules and as a single chip (die). Currently, the majority of the power modules on the market that use such devices also feature antiparallel (SiC Schotty) diodes, for example [12]- [13]. It is possible to use the MOSFET without the anti-parallel diode (unlike IGBTs) because MOSFETs naturally have an inbuilt body diode that can provide the function of the anti-parallel diode. The objective of this paper is to evaluate the advantages and disadvantages of using the additional anti-parallel diode when SiC MOSFETs are used. The power module considered in this study is shown in Fig. 1 and consists of three phase legs. Each switch contains one SiC MOSFET and a snubber capacitor. There are no additional anti-parallel diodes. The components are soldered to a copper metallised aluminium nitride ceramic substrate. The substrate is soldered to a copper baseplate. A plastic frame with pre-inserted pins is adhered to the module. Electrical connections are made by wire bonding to the components and to the pins in the frame. The components are encapsulated in a dielectric gel. A plastic lid is adhered to the frame to encapsulate the module. The MOSFET chips/dies used are: CPM2-1200-0025B [14]. When considering the anti-parallel diode CPW5-1200-Z050B [15] was used. This paper will present simulation results (thermal and electrical) and focus on the maximum junction temperature (Tj) reached by the MOSFETs under different conditions. The simulation conditions are a function of load current, inverter output voltage amplitude and load power factor. Simulations of the power module without the anti-parallel diode are based on the power module shown in Fig. 1 (a 3phase inverter for motor drive applications), this power module has also been tested in a motor drive system to validate the simulation results. The power module with the anti-parallel diodes is not available for testing, so the validated simulation techniques have been used, including the assumption that the thermal performance of the SiC MOSFETs are the same as for the module without antiparallel diode, and that there is no direct thermal coupling between the MOSFETs and the diode. The junction temperature of the MOSFET without antiparallel diode is referred to in this paper as TjM1, while the junction temperature of the MOSFET with the anti-parallel diode is referred to as TjM2. TjD is the junction temperature of the anti-parallel diode. The difference between TjM1 and TjM2 is termed ΔTjm, while Δeff is the difference between the efficiency of the two power modules when operating under the same test conditions.

II. DEVICES LOSSES
In order to evaluate the performance benefits of using additional anti-parallel diodes the losses of the devices must be analysed. In all simulations the dc link voltage is constant and equal to 760V. While in all simulation and experimental results the switching frequency was fixed (12.5 kHz).
The losses can be divided in two groups: conduction losses and switching losses. The high conduction loss of the MOSFETs natural body diode (see Fig. 2 a)) is the motivation to include additional anti-parallel diodes. However it is worth noting that when a MOSFET is in an ON-state (with a gatesource voltage (VGS) of 20V applied) it is capable of conducting current in both directions using the RDS channel. When a MOSFET is OFF (VGS=-5V) the body diode blocks current flow in only one direction. The voltage drop of the devices is a function of junction temperature (Tj). Fig. 2 is based on the assumption that both Tj's are equal to 175˚C and the data are extrapolated from the data sheet. Fig. 2 a) shows the voltage drop of the switch in the 3 rd quadrant under different load conditions, while Fig. 2 b) shows how the current is split between the MOSFETs and the anti-parallel diode. Using the anti-parallel diode can help to reduce the conduction losses of the MOSFETs in the 3 rd quadrant and will improve the total efficiency of the converter by splitting the current into two discrete devices: the diode and the MOSFET; but it is not clear how beneficial it is for the MOSFET and power module in the real application. This behaviour is not unique to this SiC MOSFEts and SiC Diode, similar results can be obtained from other SiC components made by different manufactures, such as [13].
A. Conduction losses without anti-parallel diode The instantaneous conduction losses of the MOSFETs if ON were calculated through (1) = ( , ) * 2 (1) Where RDS mainly changes as a function of the instantaneous Tj, but mainly in the 1 st quadrant, and where RDS is also a function of the current. In the 3 rd quadrant the sharing of the current between the RDS channel and the body diode was not considered because the load in the simulations was limited to 53Arms and at this current level the full current will go through the RDS , the body diode is not sharing the current (Fig. 2 a) ).

B. Conduction losses witht anti-parallel SiC Schottky diode
The instantaneous conduction losses of the SiC diode can be represented by equation (2) = ( , ) * (2) Where the instantaneous voltage drop of the SiC diode can be express as shown in (3) ( ) = ( ) + * ( ) (3) Both VT and RT are function of the junction temperature of the Diode. Fig. 3 shows the equivalent circuit of the combination SiC MOSFET and Sic Diode on the 3 rd quadrant, when the MOSFET is ON. All values (RDS, VT, RT) were extrapolated from the data sheet, and change instantaneously with the Junction temperature and current for RDS.
C. Conduction losses during the dead time The body diode will only conduct the entire current during the dead time (when both MOSFETS of the same inverter leg are OFF). In a drive application (assuming the same gate drive signals are used as in the IGBT case) the dead time is the only condition where both devices are off. The duration of the dead time should be as small as possible to avoid any need for ,compensation but big enough to avoid any shoot through or big resonant in the output current [14]. For the power module considered in this paper, Fig. 4 shows the top (yellow) and bottom (red) gate signal (10V/div) of the same leg, in blue is the phase output voltage with respect of the dc link negative point (200V/div), while in green is the phase current (50A/div), the time scale is 250nsec/div and the dead time is 200nsec. A dead time of 200nsec represents only 0.25% of the full period assuming a switching frequency of 12.5 kHz, it is therefore reasonable not to consider the conduction losses during this time. D.Switching losses The switching losses (turn on, turn off and recovery of the body diode) were extrapolated linearly in respect of the voltage and current from the data sheet of the MOSFET [16]. Each commutation is evaluated at every instance for that particular current level. The anti-parallel SiC Schottky diode benefits from having zero recovery, but does have a significant total capacitive charge that is almost half value of the reverse recovery of the body diode according to data sheet values. So when anti-parallel SiC Schottky diodes are used they also remove the recovery losses of the body diode of the MOSFETs.

III. THERMAL IMPEDANCE NETWORK
The scope of the paper is to calculate the junction temperature and efficiency of the MOSFETs for various load conditions. Because the losses (especially the conduction losses) are a function of the junction temperature, it is necessary to include the thermal model of the power module in the electrical simulation. In this section it is explained how the thermal impedances of each device of the module were derived, taking into account the interactive cross-coupling heating effects between the multiple devices inside the module.
A. The Thermal Model There are many thermal simulation tools available that are capable of calculating the transient junction temperatures. The most suitable and commonly used method for such problems is the mathematical Foster R-C network. This method fits a multiple term exponential equation, of the form of (4), to the transient thermal impedance curve of each device under self-heating and cross-heating [17]: Where R and C are the resistive and capacitive components for each term, and n is the total number of terms used to describe the impedance, Zth(t). The number of terms varies depending on the complexity of the curve, but is typically between 1 and 4. For a multi-device module, the temperature of each device is described by multiple impedance terms: one for the selfheating thermal response and one for the thermal response of the device due to heating in each of the other devices on the module. The effect of the heatsink is also included. These thermal impedance terms can then be used within the electrical simulation, allowing a handful of equations to be solved to produce the junction temperature of each device based on the loading at that moment in time [18].
This equation is given in (5), where Zxy represents the thermal impedance of device x due to heating in device y and Zxy=Zyx (i.e. the matrix is symmetrical). Px is the MOSFET power loss and Tw is the coolant temperature.  Fig. 5. Thermal Impedance response of each MOSFET due to power dissipation in MOSFET 3. The CFD response curves (solid lines) are shown alongside the fitted R-C network terms (markers).
The experimental curve for MOSFET 3 is also shown (dashed line).

B. Thermal network Extraction
To calculate the R-C terms, it is necessary to obtain thermal impedance curves. This was done using computational fluid dynamics (CFD) analysis. A single module (without cover) and the surrounding heat sink (with internal cooling channels and the thermal paste between the module and the heat sink) was imported into ANSYS. A fine mesh was applied, particularly around the MOSFETs, in order to capture accurate temperature with a high resolution at small time stepped transients.
To extract the R-C terms, the transient thermal response of the MOSFETs were calculated. In turn, a heat loss of 1W was applied evenly to the volume of each MOSFET. A 50:50 coolant mixture of water and Ethylene Glycol with a flow rate condition of 5l/min was simulated through the cooling channels. The maximum temperature response of all MOSFETs was recorded with time. The initial time step began at 10μs, and was increased adaptively through the heat pulse up to a maximum time-step of 1s, for a total duration of 90s at which point a steady thermal state was achieved.
The accuracy of the CFD results were validated against the equivalent transient curve obtained experimentally. Fig. 5. shows the match achieved. A curve fitting algorithm was used to fit a curve of the form in (4) to each thermal response curve. The number of terms used to describe each curve depended on the shape complexity. Self-heating responses (Z33 in Fig. 5) were described well with 4 terms, whereas only a single R-C term was adequate for cross-heating curves (Z3x in Fig. 5) for devices located away from the heated MOSFET which produced only a small temperature increase. Fig. 5. shows the thermal impedance of each MOSFET due to a heating in MOSFET 3. Plotted alongside the CFD curves are the points produced using the R-C terms, demonstrating a good fitting procedure. The experimental curve is also plotted for MOSFET 3, the heated device.
This procedure was performed for heat generation in each MOSFET, resulting in six thermal impedance responses for each device: one self-heating and five cross-heating.
IV THERMO-ELECTRICAL SIMULATION Fig. 6 shows a block diagram for the thermal-electrical simulation. The "model losses" block uses the inverter gate drive signals as inputs (to identify which devices are on and which are off), the voltage of the dc link for calculating the switching losses, the load current (for calculating the switching and conduction losses), and also the junction temperature from the devices. The output of this block is the total combined losses of the MOSFETs. The thermal model (which includes all thermal impedances) has two inputs: the temperature of the coolant and the losses of the MOSFETs. The output provided by this block is the estimated Tj of the MOSFETs.
In order to compare the two different power modules without physically building and testing another power module with anti-parallel diodes, it was assumed that the same thermal model could be used for both modules (for the thermal impedance of the MOSFETs) and that the losses generated by the anti-parallel diode would not to affect the temperature of MOSFETs. When the anti-parallel diode is used the MOSFETs themselves have lower losses as the current is shared with the diode. The thermal impedance of the anti-parallel diode wasn't available, so TjD was fixed according to (6) for each simulation. This approximation will slightly favour of the power module with the external antiparallel diode. TjD=TW+(TjM1-TW)*0.5 (6) Fig. 7 shows a comparison between the two different power modules under the following conditions: maximum output voltage ≈300Vrms (ph-neutral), 300Hz output frequency and a load power factor equal to 0.85. Fig. 6 Block diagram of the thermal-electrical simulation The temperature of the coolant was equal to 35°C. Fig. 7  a) shows the load current, the reference of the output voltage (note that the DC link was equal to 760 V) and the gate drive signal of the top MOSFET of the middle leg. Fig. 7 b) shows the two different junction temperatures reached by the MOSFET; in black with the anti-parallel diode and in blue without. Fig. 7 c) and d) also show the current of the MOSFETs. The presence of the diode limits the MOSFET current in the 3 rd quadrant, but the peak of the losses (e and f) remain very similar. The small reduction of the Tj peak value is due to reduced overall losses in the case with the antiparallel diode, hence the RDS value is also smaller. In this particular case the improvement gained by having the antiparallel diode is very small, in terms of inverter efficiency the improvement is equal 0.3% (the efficiency of the power module without anti-parallel diode is 97.2% while with the diode it is 97.5%); hence the diode offers only a small benefit. Fig. 8 shows the same waveforms as Fig. 7 with the same reference voltage the same rms output current but a smaller power factors (0.6). In this test condition the difference between the two tj are increasing, due to the increase in losses concentrated on the MOSFET. The peak of the losses is a bit lower than the test of Fig. 7, but there are more conduction losses when the output current is negative (Fig. 8), and in this case the presence of the anti-parallel diode is reducing the losses with more effect on the MOSFET. Note that in Fig. 7 and Fig. 8 the losses plotted are not the instantaneous values, but the filtered values with a cut frequency of 1 kHz (see Fig.  5), to allow better visualization.
To emulate a drive application the two power modules were simulated at different voltages (25%, 50% 75% and 100% of the maximum voltage) and different power factors (0.6, 0.7, 0.8, 0.9 and 0.98). The steady state Tj for the two different power modules is compared in Fig. 9 a) and b) against load current for two different output voltages, output frequencies and load power factors. Once again the coolant temperature was fixed at 35°C. Fig. 10 shows (a) ΔTj Vs output current and (b) Δeff Vs output current simulation results for four output voltage cases: 78Vrms ph-neutral (blue), 156Vrms ph-neutral (grey), 243Vrms ph-neutral (yellow) and the full voltage 300Vrms phneutral (black), for different power factors, each with the same coolant temperature of 35°C. It is clear from the results that for all load conditions (voltage, frequency and PF) if the load current is lower than 38Arms then the advantage gained by adding the anti-parallel diode is not significant (ΔTjM < ≈7°C and Δeff<0.5%). For high voltages (>250V) and maximum current the advantage of the adding the anti-parallel diode is small: ΔTjM in a range of 7-20°C and Δeff is always lower than 0.5%. The main advantage of adding the anti-parallel diode is at low voltage (<80V), high current (>53A) and low power factor (0.6), where the ΔTj =~27°C and Δeff is in the range of 1.5%, but around those operating points the output power is low. In order to validate the simulation results a motor drive was built utilising the power module of Fig. 1. While all simulations were made for a very generic scenario with different output voltage, current and power factor the experimental result are based on a specific drive and are therefore used to validate the simulation results at given operating points.
The machine used as part of the drive was a standard permanent magnet motor with 16 poles (i.e. 2500RPM corresponding to an electrical frequency of 333Hz); the machine was controlled using classic vector control and space vector modulation [19], with the field current, id, fixed at 0A and torque current, iq, limited to 80A peak (maximum motor current = 57Arms). Fig. 11 shows the experimental test results in blue and simulated results in black (under the same test conditions). The test consists of a turn on event of the drive with a speed demand of 2400rpm (no mechanical load).

Conduction
Switching Total 11 c) shows the junction temperature (simulated) of the upper MOSFET (middle leg). In order to estimate the temperature of the sensor (NTC) inside the power module, a new set of thermal impedances were calculated following the same procedure as was used for the MOSFET. These thermal impedances also included the dynamic behaviour of the thermal sensor itself. Figure 12 shows a different experimental test where the PM machine was running at 1500 rpm without any load and at time zero the machine was loaded. The duration of this test was long enough for the system to reach the steady state temperature of the thermal sensor TNTC. Once again in the experimental result are shown in blue while the simulated results are shown in black. Fig. 12 a) shows the machine speed, fig. 12 b) the iq current, and Fig. 12 c) the temperature of the TNTC, while figure 12 d) shows the simulated junction temperature. Fig. 11 and 12 show a good agreement between the experimental and simulated results. There are some small discrepancies mainly due to uncertainly of the electrical and mechanical parameters of the machine and some approximations and/or errors in the thermal impedances. It is also worth noting that there is a large difference between the temperature of the thermal sensor, TNTC and Tj (TJM1).

VI CONCLUSION
From the study presented in this paper it is clear that adding anti-parallel SiC Schottky diodes to a power module that uses SiC MOSFETs will not improve the power density of the module because at full voltage the extra diode does not provide any real benefit. However, the presence of SiC diodes can improve the efficiency of the module at low output voltages and high currents by up to 1.5%.
From a physical space perspective, the dimensions of the MOSFETs (4.04x6.44mm) are similar to the dimensions of the SiC Schottky diodes (4.9x4.9mm). It is reasonable to suggest that for the power module of Fig. 1, it would be possible to add the anti-parallel diode as there would be sufficient space. The cost of the power module must also be considered. The cost of the substrate, baseplate and the plastic frame would remain the same in both cases. However, the presence of the diodes would increase overall cost. It is possible to increase the power density of module by using two MOSFETs in parallel per switch (12 MOSFETs in total) instead of one MOSFET and one diode. Given the dimensions already described, the space requirements would remain similar. In this case the RDS of a single switch halves and the thermal impedance reduces significantly as the area of the chip is doubled.