Design of a cooperative voltage harmonic compensation strategy for islanded microgrids combining virtual admittance and repetitive controller

Non-linear loads (NLLs) in three-phase systems are known to produce current harmonics at −5, 7, −11, 13… times the fundamental frequency; harmonics of the same frequencies are induced in microgrid voltage, reducing therefore the power quality. Dedicated equipment like active power filters can be used to compensate the microgrid harmonics; alternatively, each distributed generation (DG) unit present in the microgrid can be potentially used to compensate for those harmonics. The use of the virtual admittance concept combined with a PI-RES control structure has been recently proposed as a harmonic compensation sharing strategy when multiple DGs operate in parallel. The drawback of this methodology is that a large number of RES controllers might be required to compensate for all harmonic components induced by NLLs. This paper proposes the combined use of virtual admittance control loop and repetitive controller (RC) for harmonic compensation. The main advantage of the proposed method is that only one RC is required to compensate for all the harmonic components, significantly reducing the computational burden and the design complexity.


INTRODUCTION
During the last decades, the power generation strategy has been shifted from a centralized to a distributed scenario [1]. In a centralized scenario the power is generated in large centralized power plants that transmit the electric power over long distances. Opposite to this, in the distributed generation (DG) scenario the generators typically have a smaller size and are connected to the utility grid near where the electric power is used. This reduces the transmission losses as well as the size and number of power lines needed [2]. DG scenarios can be islanded or grid connected [3]- [4]. Both scenarios can combine linear loads (LL) and non-linear loads (NLL). NLLs in three-phase systems are known to produce current harmonics typically at -5, 7, -11, 13… times the fundamental frequency (i.e. 50/60 Hz). As a consequence, harmonic components of the same frequencies are induced at the point of common coupling (PCC) voltage [5]- [7], adversely impacting the power quality. To overcome these problems, dedicated equipment like active power filters (APFs) designed to compensate harmonic current components can be used [8]. However, these solution brigs an increase of cost. An alternative to the use of APFs is to use the DG units as APF, to improve the microgrid's power quality. DGs are required to inject high frequency currents to the PCC to compensate for harmonic components due to e.g. NLLs. A relevant issue in this case is to determine how much harmonic current must be injected by each DG unit participating in the strategy. It is desired in this case that DG units closer to where the disturbance is produced inject a larger share of the harmonic current, as this will reduce the associated loses. Centralized and distributed control strategies have been already proposed to address this issue [9]- [10].
A simple solution to select the amount of harmonic current injected by each DG is to use an agent that statically assigns the harmonic current command for each DG [11]. However, this solution typically does not take into account the microgrid topology, meaning that this strategy might not minimize the transmission losses due to the harmonic current injection. An alternative solution is the use of the virtual admittance concept [10]. This method dynamically adapts the mode of operation of the inverter to the microgrid condition, such that inverters located nearer the PCC contribute in a greater degree to the compensation task. Very important, this is achieved without previous knowledge of the grid topology.
Nonetheless, the virtual admittance concept [10] requires the use of a PI-RES control structure to inject the inverter´s current harmonics. A resonant controller (RES) is used for each pair of harmonic components to be compensated for (a positive sequence harmonic and a negative sequence), therefore a large number of RES controllers might be required to compensate for all harmonic components induced by NLLs, which might result in a significant increase of the computational burden and tuning difficulties.
To overcome this limitation, this paper proposes a virtual admittance control loop based on a repetitive controller (RC). The advantage of using a RC is that it can compensate all harmonic components with reduced computational burden and design and tuning complexity.
The paper is organized as follows: Section II presents the basics of the proposed harmonic compensation strategy. The repetitive controller design is analyzed in Section III. Simulation results validating the proposed methodology are presented in Section IV. Finally, the conclusions are presented in Section V.

II. COOPERATIVE VOLTAGE HARMONIC COMPENSATION
STRATEGY FOR ISLANDED MICROGRIDS Fig. 1 shows a simplified microgrid configuration that will be used for analysis purposes. It includes two voltage source inverters (VSI) connected in parallel, the microgrid always working in island mode. Both inverters are physically connected by a static switch (S), a transmission line (TL) being placed between each inverter and the PCC. Linear (LL) and nonlinear (NLL) loads are connected to the PCC. All the variables in the following block diagrams are referred to a reference synchronous with the harmonic h being controlled inv: inverterside or out: LCL output).
The cooperative harmonic compensation strategies, including using a central controller and local controllers and the virtual admittance concept are described following.

A. Central Controller
The objective of a cooperative harmonic compensation strategy is to make use of all inverters connected to the PCC to inject harmonic currents consumed by NLLs. The central controller shown in Fig. 1

B. Local Controller with virtual admintance
The harmonic current sharing being implemented uses the virtual admittance concept [10]. A virtual admittance is connected in parallel with the inverter output and the LCL filter Fig. 1. The virtual current that this virtual admittance consumes depends on the inverter output voltage and the virtual admittance value, meaning that, for the same harmonic voltage, the higher the value of the inverter virtual admittance is, the lower the current that the inverter injects to the PCC is.
The current injected by each inverter consist of a fundamental current and harmonic current components. A synchronous PI current regulator is typically used to control the fundamental current. Resonant controllers were proposed in [10] to control the harmonic currents. Use of repetitive current controller (RC) [12]- [14] for this purpose is proposed in the next section. Advantages of RCs include simultaneous control of multiple harmonic components and easiness of its design and tuning.

A. Repetitive Controller Background
The concept of repetitive control was originally developed in 1980 by Inoue et al. for a single input single output (SISO) plant in the continuous time domain to track a periodic repetitive signal with defined period, and was applied successfully to control a proton synchrotron magnet power supply in 1981 [24]. The concept was then further investigated by Hara et al. [12]. Based on the internal model principle proposed by Francis and Wonham in 1975, any periodic reference (disturbance) signal with known period can be tracked (rejected) by including their

VSI-VCM
generator in the stable closed loop [25]. Therefore, RC is based on the idea of introducing the disturbance (signal) model in the system to track or reject it. Repetitive controllers have been widely used in applications including PWM inverters [26][27][28][29], PWM rectifiers [30], matrix converters [15], robotic manipulators [31], disk drive systems [32], four legs VSI [33]. The repetitive controller (RC), is a well know alternative to the use of a set of resonant controllers. The intrinsic characteristic of the RCs allows the automatic compensation of a defined set of multiple frequencies. The model can be introduced in both the continuous (Fig. 2) and discrete domain (Fig. 3), but the latter implementation, in digital system, has a more straightforward implementation by using (1). This results in a slow control action capable of cancelling the system steady state error to a periodic reference cycle by cycle (or rejecting periodic disturbances in the same way). RC can be used on its own only on an intrinsically stable system; for more general applications, it needs therefore to be used in conjunction with another controller (for example P or PI) which is designed with the aim of system stabilization and transient response performance. The delay N is an integer value that, which together with the sampling frequency s f , and comp f being the first target frequency to be compensated. Three different schemes of combined plant compensator and RC controllers have been proposed in the literature [13]: parallel, series and the plug-in. The plug-in structure (Fig. 4) is used in this work as it shows several advantages including the possibility to design separately the RC and the plant compensator. The plant compensator C G is firstly design to stabilize the plant and later the parameters of the RC are chosen to achieve the target signal tracking. To ensure the stability of the overall system, the basic scheme has to be modified to obtain the RC shown in Fig. 5.  The structure of the RC is characterized by a learning gain RC k , a robustness filter ( ) Q z and a stability filter ( ) f G z . The robustness filter is designed to increase the stability margin of the system while the learning gain together with the stability filter is used to stabilize the entire loop. As summarized in [18], if the two following conditions are satisfied, the stability of the system is ensured: 1. All the poles of the close loop without the RC must be within the unity circle.
2. The absolute value of the function ( ) S z (2) is less than the unity for all the frequency below the Nyquist frequency.
The second condition is obtained applying the small gain theorem [16] to the error transfer function of the control loop shown in Fig. 3. Several choices exist to define the RC controller. First of all the robustness filter Q( ) z can be either a close-to-unity gain constant [18] or a moving average filter [21]. Both solutions enhance the stability margin of the model; the close-to-unity choice is the simplest solution in terms of implementation, but it compensates all the poles in the same manner. This means poorer tracking/rejection at lower frequencies. The second solution considers the use of a low pass filter that moves the high frequency poles inside the unity circle, resulting in poorer performances only for the high frequency poles. This solution is an acceptable trade-off between reasonable stability margins and accurate tracking/rejection at lower frequencies. For what concerns the stability filter ( ) f G z two different solutions can be adopted, as discussed in [15]. The first solution is a zero-phase-errortracking-compensator [20]; however, the design is quite complicated and an accurate plant model is required. An alternative solution is the time-advanced-compensator that has the effect of balancing the phase shift introduced by the RC. The time-advanced compensator assumes the expression (3), where A T is the time advanced step. The RC k gain is adjusted to achieve the condition of the small gain theorem. In general the range of feasible values for the repetitive controller is

B. Repetitive Controller Design
The proposed control is based on the plug-in configuration of the repetitive controller. The number of necessary finite delays N is selected according with (1). The low pass filter has been selected as a moving average filter whose transfer function is (4).
The stability filter ( ) f G z has been selected as a timeadvanced compensator (3). The proposed design uses a sampling frequency of 9.9 kHz and number of finite delays equal to 33 (1). The learning gain RC k has been adapted for the different network topologies; for doing so an initial learning gain RC init k has been defined to stabilize the system when the VSI-CCM inverter is not connected to the PCC (Fig. 1). The design parameters are summarized in Table I. IV. SIMULATION RESULTS Fig. 1 and Table I show the simulation scenario and the simulation parameters respectively. Fig. 6 shows the local controller block diagram that is implemented in each inverter (VSI-VCM and VSI-CCM, see Fig. 1); it includes the virtual admittance control loop (shown in red color, see Fig. 6; more details can be found in [10]) and the plug-in RC. Fig. 7 shows the simulation results using both the proposed control strategy with a RC, and with RES controllers [10]. The implementation using RES controllers is configured to compensate only for -5 th and 7 th harmonic components [10].
The THD before harmonic compensation is enabled is 8.7 %, the cooperative harmonic compensation starting at t=0.6 s. It is observed from Fig. 7b that the voltage THD reduces to 0.07% using the proposed PI-RC implementation, and 3.12% when using the PI-RES implementation. This is due to the fact that the PI-RES implementation only compensates for the -5 th and 7 th PCC voltage harmonic while the RC compensates all higher order harmonics (-5 th , 7 th , -11 th , 13 th …). Fig. 7b-7e show the magnitude of the current harmonic injected by each inverter for the PI-RC and PI-RES implementations. Independent of the method being used, the higher the virtual admittance is, the lower is the current being injected: while t<2s, the virtual admittance of both inverters is set to zero, both VSI-VCM and VSI-CCM injecting the same amount of current for all of the controlled harmonics, see Fig.  7b-7e). At t=2 s, the VSI-VCM virtual admittance is set to 0.05 Ω -1 while the VSI-CCM virtual admittance is set to 0.01 Ω -1 , the VSI-VCM injects therefore less harmonic current than the VSI-CCM (see Fig. 7b-7e). At t=3 s the virtual admittances of both inverters are swapped; the VSI-CCM injecting therefore less current than the VSI-VCM. For t>4 s, the virtual admittance of VSI-VCM is set to infinite (see Fig. 7a), therefore it stops injecting harmonic current (see Fig. 7b-7e), i.e. all the harmonic current is consumed by the virtual admittance. It is finally noted that the -11 th and 13 th harmonic currents are not controlled when using the PI-RES implementation, see Fig. 7d and 7e, no RES controller being implemented to compensate for those harmonic components.
Finally, Fig. 8a and 8b shows the PCC voltages before and after the compensation respectively.    In this paper, a cooperative voltage harmonic compensation strategy based on a centralized controller, the virtual admittance concept and a PI-RC controller has been presented. The advantage of the proposed implementation is that a single RC can compensate for all harmonic components typically produced by NLLs, which decreases the design complexity compared with previous implementations based on PI-RES structures.
The design and implementation of the central controller, the virtual admittance and the RC has been developed. Simulation tests have been provided to demonstrate the viability of the proposed method. From the obtained results, it has been proved that by just changing the controller from a resonant to a repetitive controller, the PCC voltage THD can be reduced form ≈3% to ≈0%.