Developing power semiconductor device model for virtual prototyping of power electronics systems

Li, Ke; Evans, Paul; Johnson, Christopher Mark

Abstract

Virtual prototyping (VP) is very important for power electronics systems design. A virtual prototyping design tool based on different modelling technology and model order reduction is proposed in the paper. In order to combine circuit electromagnetic model with power semiconductor device models, a SiC-JFET behavioural model is presented and implemented in the design tool. A half bridge circuit using SiC-JFET devices is thus represented in the VP software. The presented SiC-JFET behavioural model is then validated by comparing with experimental measurements on switching waveforms.

Citation

Li, K., Evans, P., & Johnson, C. M. (2016). Developing power semiconductor device model for virtual prototyping of power electronics systems.

• Conference Name: 13th IEEE Vehicle Power and Propulsion Conference (VPPC 2016)
• End Date: Oct 20, 2016
• Acceptance Date: Jun 14, 2016
• Publication Date: Oct 18, 2016
• Deposit Date: Nov 17, 2016
• Publicly Available Date: Nov 17, 2016
• Peer Reviewed: Peer Reviewed
• Keywords: Virtual prototyping; Model order reduction; Power semiconductor device modelling; Behavioural model; Switching waveforms
• Public URL: https://nottingham-repository.worktribe.com/output/822988
• Publisher URL: http://ieeexplore.ieee.org/document/7791664/
• Related Public URLs: http://www.vppc2016.org/
• Additional Information: © 2016 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.